[Mlir-commits] [mlir] [mlir][Affine][SCF][Vector] Migrate to split inherent/discardable attribute APIs (PR #218913)
llvmlistbot at llvm.org
llvmlistbot at llvm.org
Wed Aug 26 05:12:08 PDT 2026
llvmorg-github-actions[bot] wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-mlir-scf
@llvm/pr-subscribers-mlir-vector
@llvm/pr-subscribers-mlir-gpu
Author: Mehdi Amini (joker-eph)
<details>
<summary>Changes</summary>
Migrate the Affine, Arith, Arm vector, SCF, and Vector dialect families and related conversions to explicit discardable or typed attribute access.
Assisted-by: Codex
---
Patch is 62.96 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/218913.diff
33 Files Affected:
- (modified) mlir/include/mlir/Dialect/ArmSME/IR/ArmSMEOps.td (+2-2)
- (modified) mlir/lib/Conversion/SCFToControlFlow/SCFToControlFlow.cpp (+2-2)
- (modified) mlir/lib/Conversion/SCFToGPU/SCFToGPU.cpp (+10-9)
- (modified) mlir/lib/Conversion/VectorToArmSME/VectorToArmSME.cpp (+3-3)
- (modified) mlir/lib/Conversion/VectorToSCF/VectorToSCF.cpp (+5-5)
- (modified) mlir/lib/Dialect/Affine/Analysis/Utils.cpp (+2-1)
- (modified) mlir/lib/Dialect/Affine/IR/AffineOps.cpp (+47-53)
- (modified) mlir/lib/Dialect/Affine/Transforms/PipelineDataTransfer.cpp (+1-1)
- (modified) mlir/lib/Dialect/Affine/Transforms/SimplifyAffineStructures.cpp (+8-2)
- (modified) mlir/lib/Dialect/Affine/Transforms/SuperVectorize.cpp (+5-3)
- (modified) mlir/lib/Dialect/Affine/Utils/Utils.cpp (+9-10)
- (modified) mlir/lib/Dialect/Arith/IR/ArithOps.cpp (+9-4)
- (modified) mlir/lib/Dialect/Arith/Transforms/EmulateUnsupportedFloats.cpp (+5-3)
- (modified) mlir/lib/Dialect/Arith/Transforms/IntRangeOptimizations.cpp (+3-2)
- (modified) mlir/lib/Dialect/Arith/Transforms/UnsignedWhenEquivalent.cpp (+3-2)
- (modified) mlir/lib/Dialect/ArmSME/Transforms/EnableArmStreaming.cpp (+3-3)
- (modified) mlir/lib/Dialect/ArmSVE/Transforms/LegalizeVectorStorage.cpp (+2-2)
- (modified) mlir/lib/Dialect/SCF/IR/SCF.cpp (+29-20)
- (modified) mlir/lib/Dialect/SCF/Transforms/BufferizableOpInterfaceImpl.cpp (+2-1)
- (modified) mlir/lib/Dialect/SCF/Transforms/ForToWhile.cpp (+3-2)
- (modified) mlir/lib/Dialect/SCF/Transforms/ForallToParallel.cpp (+1-1)
- (modified) mlir/lib/Dialect/SCF/Transforms/LoopSpecialization.cpp (+9-7)
- (modified) mlir/lib/Dialect/SCF/Transforms/StructuralTypeConversions.cpp (+2-2)
- (modified) mlir/lib/Dialect/Vector/IR/VectorOps.cpp (+20-12)
- (modified) mlir/lib/Dialect/Vector/Transforms/VectorDistribute.cpp (+2-1)
- (modified) mlir/lib/Dialect/Vector/Transforms/VectorDropLeadUnitDim.cpp (+13-7)
- (modified) mlir/lib/Dialect/Vector/Transforms/VectorLinearize.cpp (+6-2)
- (modified) mlir/lib/Dialect/Vector/Transforms/VectorTransferSplitRewritePatterns.cpp (+5-3)
- (modified) mlir/lib/Dialect/Vector/Transforms/VectorTransforms.cpp (+12-8)
- (modified) mlir/lib/Dialect/Vector/Transforms/VectorUnroll.cpp (+4-2)
- (modified) mlir/test/lib/Dialect/SCF/TestLoopUnrolling.cpp (+1-1)
- (modified) mlir/test/lib/Dialect/SCF/TestParallelLoopUnrolling.cpp (+1-1)
- (modified) mlir/test/lib/Dialect/SCF/TestSCFUtils.cpp (+14-11)
``````````diff
diff --git a/mlir/include/mlir/Dialect/ArmSME/IR/ArmSMEOps.td b/mlir/include/mlir/Dialect/ArmSME/IR/ArmSMEOps.td
index 264c3969a1152..22ed496a9f48f 100644
--- a/mlir/include/mlir/Dialect/ArmSME/IR/ArmSMEOps.td
+++ b/mlir/include/mlir/Dialect/ArmSME/IR/ArmSMEOps.td
@@ -63,7 +63,7 @@ def ArmSMETileOpInterface : OpInterface<"ArmSMETileOpInterface"> {
if (!tileId)
return;
::mlir::Operation* op = this->getOperation();
- op->setAttr("tile_id", tileId);
+ op->setDiscardableAttr("tile_id", tileId);
}]
>,
InterfaceMethod<
@@ -77,7 +77,7 @@ def ArmSMETileOpInterface : OpInterface<"ArmSMETileOpInterface"> {
/*methodBody=*/[{}],
/*defaultImpl=*/ [{
::mlir::Operation* op = this->getOperation();
- return op->getAttrOfType<mlir::IntegerAttr>("tile_id");
+ return op->getDiscardableAttrOfType<mlir::IntegerAttr>("tile_id");
}]
>,
InterfaceMethod<
diff --git a/mlir/lib/Conversion/SCFToControlFlow/SCFToControlFlow.cpp b/mlir/lib/Conversion/SCFToControlFlow/SCFToControlFlow.cpp
index 2972d79c4302f..eba6ef8c48fa2 100644
--- a/mlir/lib/Conversion/SCFToControlFlow/SCFToControlFlow.cpp
+++ b/mlir/lib/Conversion/SCFToControlFlow/SCFToControlFlow.cpp
@@ -319,8 +319,8 @@ static void propagateLoopAttrs(Operation *scfOp, Operation *brOp) {
// LLVM requires the loop metadata to be attached on the "latch" block. Which
// is the back-edge to the header block (conditionBlock)
SmallVector<NamedAttribute> llvmAttrs;
- llvm::copy_if(scfOp->getAttrs(), std::back_inserter(llvmAttrs),
- [](auto attr) {
+ llvm::copy_if(scfOp->getDiscardableAttrDictionary().getValue(),
+ std::back_inserter(llvmAttrs), [](auto attr) {
return isa<LLVM::LLVMDialect>(attr.getValue().getDialect());
});
brOp->setDiscardableAttrs(llvmAttrs);
diff --git a/mlir/lib/Conversion/SCFToGPU/SCFToGPU.cpp b/mlir/lib/Conversion/SCFToGPU/SCFToGPU.cpp
index 370457c85e797..26b2f537e91a7 100644
--- a/mlir/lib/Conversion/SCFToGPU/SCFToGPU.cpp
+++ b/mlir/lib/Conversion/SCFToGPU/SCFToGPU.cpp
@@ -41,7 +41,7 @@ using namespace mlir::scf;
// Name of internal attribute to mark visited operations during conversion.
//
// NOTE: The conversion originally used the following legality criteria:
-// `!parallelOp->hasAttr(gpu::getMappingAttrName())`
+// `!parallelOp->hasDiscardableAttr(gpu::getMappingAttrName())`
// But the provided pattern might reject some cases based on more detailed
// analysis of the `mapping` attribute.
// To avoid dialect conversion failure due to non-converted illegal operation
@@ -408,8 +408,8 @@ static LogicalResult processParallelLoop(
DenseMap<gpu::Processor, Value> &bounds, PatternRewriter &rewriter) {
// TODO: Verify that this is a valid GPU mapping.
// processor ids: 0-2 block [x/y/z], 3-5 -> thread [x/y/z], 6-> sequential
- ArrayAttr mapping =
- parallelOp->getAttrOfType<ArrayAttr>(gpu::getMappingAttrName());
+ ArrayAttr mapping = parallelOp->getDiscardableAttrOfType<ArrayAttr>(
+ gpu::getMappingAttrName());
// TODO: Support multiple reductions.
if (!mapping || parallelOp.getNumResults() > 1)
@@ -562,11 +562,12 @@ static LogicalResult processParallelLoop(
// Propagate custom user defined optional attributes, that can be used at
// later stage, such as extension data for GPU kernel dispatch
- for (const auto &namedAttr : parallelOp->getAttrs()) {
+ for (const auto &namedAttr :
+ parallelOp->getDiscardableAttrDictionary().getValue()) {
if (namedAttr.getName() == gpu::getMappingAttrName() ||
namedAttr.getName() == ParallelOp::getOperandSegmentSizeAttr())
continue;
- launchOp->setAttr(namedAttr.getName(), namedAttr.getValue());
+ launchOp->setDiscardableAttr(namedAttr.getName(), namedAttr.getValue());
}
Block *body = parallelOp.getBody();
@@ -614,7 +615,7 @@ LogicalResult
ParallelToGpuLaunchLowering::matchAndRewrite(ParallelOp parallelOp,
PatternRewriter &rewriter) const {
// Mark the operation as visited for recursive legality check.
- parallelOp->setAttr(kVisitedAttrName, rewriter.getUnitAttr());
+ parallelOp->setDiscardableAttr(kVisitedAttrName, rewriter.getUnitAttr());
// We can only transform starting at the outer-most loop. Launches inside of
// parallel loops are not supported.
@@ -775,13 +776,13 @@ void mlir::populateParallelLoopToGPUPatterns(RewritePatternSet &patterns) {
void mlir::configureParallelLoopToGPULegality(ConversionTarget &target) {
target.addLegalDialect<memref::MemRefDialect>();
target.addDynamicallyLegalOp<scf::ParallelOp>([](scf::ParallelOp parallelOp) {
- return !parallelOp->hasAttr(gpu::getMappingAttrName()) ||
- parallelOp->hasAttr(kVisitedAttrName);
+ return !parallelOp->hasDiscardableAttr(gpu::getMappingAttrName()) ||
+ parallelOp->hasDiscardableAttr(kVisitedAttrName);
});
}
void mlir::finalizeParallelLoopToGPUConversion(Operation *op) {
op->walk([](scf::ParallelOp parallelOp) {
- parallelOp->removeAttr(kVisitedAttrName);
+ parallelOp->removeDiscardableAttr(kVisitedAttrName);
});
}
diff --git a/mlir/lib/Conversion/VectorToArmSME/VectorToArmSME.cpp b/mlir/lib/Conversion/VectorToArmSME/VectorToArmSME.cpp
index 778c616f1bf44..6ec404e982577 100644
--- a/mlir/lib/Conversion/VectorToArmSME/VectorToArmSME.cpp
+++ b/mlir/lib/Conversion/VectorToArmSME/VectorToArmSME.cpp
@@ -300,9 +300,9 @@ struct TransposeOpToArmSMELowering
// Fold transpose into transfer_read to enable in-flight transpose when
// converting to arm_sme.tile_load.
rewriter.modifyOpInPlace(xferOp, [&]() {
- xferOp->setAttr(xferOp.getPermutationMapAttrName(),
- AffineMapAttr::get(AffineMap::getPermutationMap(
- permutation, transposeOp.getContext())));
+ xferOp.setPermutationMapAttr(
+ AffineMapAttr::get(AffineMap::getPermutationMap(
+ permutation, transposeOp.getContext())));
});
rewriter.replaceOp(transposeOp, xferOp);
return success();
diff --git a/mlir/lib/Conversion/VectorToSCF/VectorToSCF.cpp b/mlir/lib/Conversion/VectorToSCF/VectorToSCF.cpp
index c9eba6962e6a4..3a48e2e6abf6a 100644
--- a/mlir/lib/Conversion/VectorToSCF/VectorToSCF.cpp
+++ b/mlir/lib/Conversion/VectorToSCF/VectorToSCF.cpp
@@ -272,7 +272,7 @@ template <typename OpTy>
static void maybeApplyPassLabel(OpBuilder &b, OpTy newXferOp,
unsigned targetRank) {
if (newXferOp.getVectorType().getRank() > targetRank)
- newXferOp->setAttr(kPassLabel, b.getUnitAttr());
+ newXferOp->setDiscardableAttr(kPassLabel, b.getUnitAttr());
}
namespace lowering_n_d {
@@ -550,7 +550,7 @@ struct Strategy<TransferWriteOp> {
template <typename OpTy>
static LogicalResult checkPrepareXferOp(OpTy xferOp, PatternRewriter &rewriter,
VectorTransferToSCFOptions options) {
- if (xferOp->hasAttr(kPassLabel))
+ if (xferOp->hasDiscardableAttr(kPassLabel))
return rewriter.notifyMatchFailure(
xferOp, "kPassLabel is present (vector-to-scf lowering in progress)");
if (xferOp.getVectorType().getRank() <= options.targetRank)
@@ -606,7 +606,7 @@ struct PrepareTransferReadConversion
auto buffers = allocBuffers(rewriter, xferOp);
auto *newXfer = rewriter.clone(*xferOp.getOperation());
- newXfer->setAttr(kPassLabel, rewriter.getUnitAttr());
+ newXfer->setDiscardableAttr(kPassLabel, rewriter.getUnitAttr());
if (xferOp.getMask()) {
dyn_cast<TransferReadOp>(newXfer).getMaskMutable().assign(
buffers.maskBuffer);
@@ -661,7 +661,7 @@ struct PrepareTransferWriteConversion
auto loadedVec = memref::LoadOp::create(rewriter, loc, buffers.dataBuffer);
rewriter.modifyOpInPlace(xferOp, [&]() {
xferOp.getValueToStoreMutable().assign(loadedVec);
- xferOp->setAttr(kPassLabel, rewriter.getUnitAttr());
+ xferOp->setDiscardableAttr(kPassLabel, rewriter.getUnitAttr());
});
if (xferOp.getMask()) {
@@ -906,7 +906,7 @@ struct TransferOpConversion : public VectorToSCFPattern<OpTy> {
LogicalResult matchAndRewrite(OpTy xferOp,
PatternRewriter &rewriter) const override {
- if (!xferOp->hasAttr(kPassLabel))
+ if (!xferOp->hasDiscardableAttr(kPassLabel))
return rewriter.notifyMatchFailure(
xferOp, "kPassLabel is present (progressing lowering in progress)");
diff --git a/mlir/lib/Dialect/Affine/Analysis/Utils.cpp b/mlir/lib/Dialect/Affine/Analysis/Utils.cpp
index 321c8e34d907c..4f65b392da603 100644
--- a/mlir/lib/Dialect/Affine/Analysis/Utils.cpp
+++ b/mlir/lib/Dialect/Affine/Analysis/Utils.cpp
@@ -1945,7 +1945,8 @@ void mlir::affine::getComputationSliceState(
for (unsigned i = 0; i < numSliceLoopIVs; ++i) {
Value iv = getSliceLoop(i).getInductionVar();
if (sequentialLoops.count(iv) == 0 &&
- getSliceLoop(i)->getAttr(kSliceFusionBarrierAttrName) == nullptr)
+ getSliceLoop(i)->getDiscardableAttr(kSliceFusionBarrierAttrName) ==
+ nullptr)
continue;
// Skip reset of bounds of reduction loop inserted in the destination loop
// that meets the following conditions:
diff --git a/mlir/lib/Dialect/Affine/IR/AffineOps.cpp b/mlir/lib/Dialect/Affine/IR/AffineOps.cpp
index 9f0734dab3b31..e71e42ff4fc42 100644
--- a/mlir/lib/Dialect/Affine/IR/AffineOps.cpp
+++ b/mlir/lib/Dialect/Affine/IR/AffineOps.cpp
@@ -574,7 +574,8 @@ void AffineApplyOp::print(OpAsmPrinter &p) {
p << " " << getMapAttr();
printDimAndSymbolList(operand_begin(), operand_end(),
getAffineMap().getNumDims(), p);
- p.printOptionalAttrDict((*this)->getAttrs(), /*elidedAttrs=*/{"map"});
+ p.printOptionalAttrDict((*this)->getDiscardableAttrDictionary().getValue(),
+ /*elidedAttrs=*/{"map"});
}
LogicalResult AffineApplyOp::verify() {
@@ -2507,7 +2508,7 @@ void AffineForOp::print(OpAsmPrinter &p) {
p.printRegion(getRegion(), /*printEntryBlockArgs=*/false,
printBlockTerminators);
p.printOptionalAttrDict(
- (*this)->getAttrs(),
+ (*this)->getDiscardableAttrDictionary().getValue(),
/*elidedAttrs=*/{getLowerBoundMapAttrName(getOperation()->getName()),
getUpperBoundMapAttrName(getOperation()->getName()),
getStepAttrName(getOperation()->getName()),
@@ -3199,8 +3200,7 @@ ValueRange AffineIfOp::getSuccessorInputs(RegionSuccessor successor) {
LogicalResult AffineIfOp::verify() {
// Verify that we have a condition attribute.
// FIXME: This should be specified in the arguments list in ODS.
- auto conditionAttr =
- (*this)->getAttrOfType<IntegerSetAttr>(getConditionAttrStrName());
+ auto conditionAttr = getConditionAttr();
if (!conditionAttr)
return emitOpError("requires an integer set attribute named 'condition'");
@@ -3270,8 +3270,7 @@ ParseResult AffineIfOp::parse(OpAsmParser &parser, OperationState &result) {
}
void AffineIfOp::print(OpAsmPrinter &p) {
- auto conditionAttr =
- (*this)->getAttrOfType<IntegerSetAttr>(getConditionAttrStrName());
+ auto conditionAttr = getConditionAttr();
p << " " << conditionAttr;
printDimAndSymbolList(operand_begin(), operand_end(),
conditionAttr.getValue().getNumDims(), p);
@@ -3290,18 +3289,14 @@ void AffineIfOp::print(OpAsmPrinter &p) {
}
// Print the attribute list.
- p.printOptionalAttrDict((*this)->getAttrs(),
+ p.printOptionalAttrDict((*this)->getDiscardableAttrDictionary().getValue(),
/*elidedAttrs=*/getConditionAttrStrName());
}
-IntegerSet AffineIfOp::getIntegerSet() {
- return (*this)
- ->getAttrOfType<IntegerSetAttr>(getConditionAttrStrName())
- .getValue();
-}
+IntegerSet AffineIfOp::getIntegerSet() { return getConditionAttr().getValue(); }
void AffineIfOp::setIntegerSet(IntegerSet newSet) {
- (*this)->setAttr(getConditionAttrStrName(), IntegerSetAttr::get(newSet));
+ setConditionAttr(IntegerSetAttr::get(newSet));
}
void AffineIfOp::setConditional(IntegerSet set, ValueRange operands) {
@@ -3451,12 +3446,13 @@ ParseResult AffineLoadOp::parse(OpAsmParser &parser, OperationState &result) {
void AffineLoadOp::print(OpAsmPrinter &p) {
p << " " << getMemRef() << '[';
- if (AffineMapAttr mapAttr =
- (*this)->getAttrOfType<AffineMapAttr>(getMapAttrStrName()))
+ if (AffineMapAttr mapAttr = getMapAttr())
p.printAffineMapOfSSAIds(mapAttr, getMapOperands());
p << ']';
- p.printOptionalAttrDict((*this)->getAttrs(),
- /*elidedAttrs=*/{getMapAttrStrName()});
+ NamedAttrList attrs((*this)->getDiscardableAttrDictionary());
+ if (IntegerAttr alignment = getAlignmentAttr())
+ attrs.append(getAlignmentAttrName(), alignment);
+ p.printOptionalAttrDict(attrs, /*elidedAttrs=*/{getMapAttrStrName()});
p << " : " << getMemRefType();
}
@@ -3488,10 +3484,9 @@ LogicalResult AffineLoadOp::verify() {
if (getType() != memrefType.getElementType())
return emitOpError("result type must match element type of memref");
- if (failed(verifyMemoryOpIndexing(
- *this, (*this)->getAttrOfType<AffineMapAttr>(getMapAttrStrName()),
- getMapOperands(), memrefType,
- /*numIndexOperands=*/getNumOperands() - 1)))
+ if (failed(verifyMemoryOpIndexing(*this, getMapAttr(), getMapOperands(),
+ memrefType,
+ /*numIndexOperands=*/getNumOperands() - 1)))
return failure();
return success();
@@ -3587,12 +3582,13 @@ ParseResult AffineStoreOp::parse(OpAsmParser &parser, OperationState &result) {
void AffineStoreOp::print(OpAsmPrinter &p) {
p << " " << getValueToStore();
p << ", " << getMemRef() << '[';
- if (AffineMapAttr mapAttr =
- (*this)->getAttrOfType<AffineMapAttr>(getMapAttrStrName()))
+ if (AffineMapAttr mapAttr = getMapAttr())
p.printAffineMapOfSSAIds(mapAttr, getMapOperands());
p << ']';
- p.printOptionalAttrDict((*this)->getAttrs(),
- /*elidedAttrs=*/{getMapAttrStrName()});
+ NamedAttrList attrs((*this)->getDiscardableAttrDictionary());
+ if (IntegerAttr alignment = getAlignmentAttr())
+ attrs.append(getAlignmentAttrName(), alignment);
+ p.printOptionalAttrDict(attrs, /*elidedAttrs=*/{getMapAttrStrName()});
p << " : " << getMemRefType();
}
@@ -3603,10 +3599,9 @@ LogicalResult AffineStoreOp::verify() {
return emitOpError(
"value to store must have the same type as memref element type");
- if (failed(verifyMemoryOpIndexing(
- *this, (*this)->getAttrOfType<AffineMapAttr>(getMapAttrStrName()),
- getMapOperands(), memrefType,
- /*numIndexOperands=*/getNumOperands() - 2)))
+ if (failed(verifyMemoryOpIndexing(*this, getMapAttr(), getMapOperands(),
+ memrefType,
+ /*numIndexOperands=*/getNumOperands() - 2)))
return failure();
return success();
@@ -3642,14 +3637,14 @@ static LogicalResult verifyAffineMinMaxOp(T op) {
template <typename T>
static void printAffineMinMaxOp(OpAsmPrinter &p, T op) {
- p << ' ' << op->getAttr(T::getMapAttrStrName());
+ p << ' ' << op.getMapAttr();
auto operands = op.getOperands();
unsigned numDims = op.getMap().getNumDims();
p << '(' << operands.take_front(numDims) << ')';
if (operands.size() != numDims)
p << '[' << operands.drop_front(numDims) << ']';
- p.printOptionalAttrDict(op->getAttrs(),
+ p.printOptionalAttrDict(op->getDiscardableAttrDictionary().getValue(),
/*elidedAttrs=*/{T::getMapAttrStrName()});
}
@@ -3695,7 +3690,7 @@ static OpFoldResult foldMinMaxOp(T op, ArrayRef<Attribute> operands) {
// If the map is the same, report that folding did not happen.
if (foldedMap == op.getMap())
return {};
- op->setAttr("map", AffineMapAttr::get(foldedMap));
+ op.setMapAttr(AffineMapAttr::get(foldedMap));
return op.getResult();
}
@@ -4033,21 +4028,20 @@ ParseResult AffinePrefetchOp::parse(OpAsmParser &parser,
void AffinePrefetchOp::print(OpAsmPrinter &p) {
p << " " << getMemref() << '[';
- AffineMapAttr mapAttr =
- (*this)->getAttrOfType<AffineMapAttr>(getMapAttrStrName());
+ AffineMapAttr mapAttr = getMapAttr();
if (mapAttr)
p.printAffineMapOfSSAIds(mapAttr, getMapOperands());
p << ']' << ", " << (getIsWrite() ? "write" : "read") << ", " << "locality<"
<< getLocalityHint() << ">, " << (getIsDataCache() ? "data" : "instr");
p.printOptionalAttrDict(
- (*this)->getAttrs(),
+ (*this)->getDiscardableAttrDictionary().getValue(),
/*elidedAttrs=*/{getMapAttrStrName(), getLocalityHintAttrStrName(),
getIsDataCacheAttrStrName(), getIsWriteAttrStrName()});
p << " : " << getMemRefType();
}
LogicalResult AffinePrefetchOp::verify() {
- auto mapAttr = (*this)->getAttrOfType<AffineMapAttr>(getMapAttrStrName());
+ auto mapAttr = getMapAttr();
if (mapAttr) {
AffineMap map = mapAttr.getValue();
if (map.getNumResults() != getMemRefType().getRank())
@@ -4475,7 +4469,7 @@ void AffineParallelOp::print(OpAsmPrinter &p) {
p.printRegion(getRegion(), /*printEntryBlockArgs=*/false,
/*printBlockTerminators=*/getNumResults());
p.printOptionalAttrDict(
- (*this)->getAttrs(),
+ (*this)->getDiscardableAttrDictionary().getValue(),
/*elidedAttrs=*/{AffineParallelOp::getReductionsAttrStrName(),
AffineParallelOp::getLowerBoundsMapAttrStrName(),
AffineParallelOp::getLowerBoundsGroupsAttrStrName(),
@@ -4818,12 +4812,13 @@ ParseResult AffineVectorLoadOp::parse(OpAsmParser &parser,
void AffineVectorLoadOp::print(OpAsmPrinter &p) {
p << " " << getMemRef() << '[';
- if (AffineMapAttr mapAttr =
- (*this)->getAttrOfType<AffineMapAttr>(getMapAttrStrName()))
+ if (AffineMapAttr mapAttr = getMapAttr())
p.printAffineMapOfSSAIds(mapAttr, getMapOperands());
p << ']';
- p.printOptionalAttrDict((*this)->getAttrs(),
- /*elidedAttrs=*/{getMapAttrStrName()});
+ NamedAttrList attrs((*this)->getDiscardableAttrDictionary());
+ if (IntegerAttr alignment = getAlignmentAttr())
+ attrs.append(getAlignmentAttrName(), alignment);
+ p.printOptionalAttrDict(attrs, /*elidedAttrs=*/{getMapAttrStrName()});
p << " : " << getMemRefType() << ", " << getType();
}
@@ -4839,10 +4834,9 @@ static LogicalResult verifyVectorMemoryOp(Operation *op, MemRefType memrefType,
LogicalResult AffineVectorLoadOp::verify() {
MemRefType memrefType = getMemRefType();
- if (failed(verifyMemoryOpIndexing(
- *this, (*this)->getAttrOfType<AffineMapAttr>(getMapAttrStrName()),
- getMapOperands(), memrefType,
- /*numIndexOperands=*/getNumOperands() - 1)))
+ if (failed(verifyMemoryOpIndexing(*this, getMapAttr(), getMapOperands(),
+ memrefType,
+ /*numIndexOperands=*/getNumOperands() - 1)))
return failure();
if (failed(verifyVectorMemoryOp(getOperation(), memrefType, getVectorType())))
@@ -4913,21 +4907,21 @@ ParseResult AffineVectorStoreOp::parse(OpAsmParser &parser,
void AffineVectorStoreOp::print(OpAsmPrinter &p) {
p << " " << getValueToStore();
p << ", " << getMemRef() << '[';
- if (AffineMapAttr mapAttr =
- (*this)->getAttrOfType<AffineMapAttr>(getMapAttrStrName()))
+ if (AffineMapAttr mapAttr = getMapAttr())
p.printAffineMapOfSSAIds(mapAttr, getMapOperands());
p << ']';
- p.printOptionalAttrDict((*this)->getAttrs(),
- /*elidedAttrs=*/{getMapAttrStrName()});
+ NamedAttrList attrs((*this)->getDiscardableAttrDictionary());
+ if (IntegerAttr alignment = getAlignmentAttr())
+ attrs.append(getAlignmentAttrName(), alignment);
+ p.printOptionalAttrDict(attrs, /*elidedAttrs=*/{getMapAttrStrName()});
p << " : " << getMemRefType() << ", " << getValueToStore().getType();
}
LogicalResult AffineVectorStoreOp::verify() {
MemRefType memrefType = getMemRefType();
- if (failed(verifyMemoryOpIndexing(
- *this, (*this)->getAttrOfType<AffineMapAttr>(getMapAttrStrName()...
[truncated]
``````````
</details>
https://github.com/llvm/llvm-project/pull/218913
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