[Mlir-commits] [clang] [llvm] [mlir] [AMDGPU] Fix missing cache bypass scope on seq_cst buffer fat pointer atomics (PR #213585)

[Krzysztof Drewniak]

https://github.com/krzysz00 commented:

I think this is reasonable - and @arsenm (or some other person) for a design check before we land

I assume the changes in LLVM around the amdgpu_atomicity operand bundle are related to this sentence about unknown operand bundles from LangRef
> Calls and invokes with operand bundles have unknown read / write effect on the heap on entry and exit (even if the call target specifies a memory attribute), unless they’re overridden with callsite specific attributes.

One question ... should we actually put an `amdgpu` prefix on this? I wonder if there are intrinsics on other GPUs that would want this operand bundle, and we can save them from a confusing prefix.

Not 100% sure who to @ for that question, though.

https://github.com/llvm/llvm-project/pull/213585