[Mlir-commits] [mlir] [mlir][xegpu] Lower dynamic high-D nd load/store via base-pointer fold (PR #215711)

[Jianhui Li]

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@@ -398,6 +439,36 @@ class LoadStorePrefetchNdToXeVMPattern : public OpConversionPattern<OpType> {
                                                     mixedOffsets[tileRank - 2]);
       offsetH = getValueOrCreateCastToIndexLike(rewriter, loc,
                                                 rewriter.getI32Type(), offsetH);
+      // Fold the leading (batch) offsets into the base pointer:
+      //   basePtr += (sum_d offset[d] * leadingStride[d]) * elemBytes
+      // using the batch strides encoded at create time. This keeps the 2D-block
+      // surface at the innermost matrix, avoiding the HW surface-size limits.
+      if (tileRank > 2) {
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Jianhui-Li wrote:

Add check upfront inside the pattern. 

https://github.com/llvm/llvm-project/pull/215711