[Mlir-commits] [mlir] [mlir][AMDGPU] Diagnose unsupported packed fp8 conversions (PR #210565)

[Tim Gymnich]

https://github.com/tgymnich updated https://github.com/llvm/llvm-project/pull/210565

>From 3175d45101f2b64718eb9f8073f6ec148c73494c Mon Sep 17 00:00:00 2001
From: qyingwu <qiyingwu at utexas.edu>
Date: Sat, 18 Jul 2026 18:40:00 -0700
Subject: [PATCH] [mlir][AMDGPU] Diagnose unsupported packed fp8 conversions

---
 .../Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp |  6 ++++++
 .../AMDGPUToROCDL/packed-trunc-invalid.mlir    | 18 ++++++++++++++++++
 2 files changed, 24 insertions(+)
 create mode 100644 mlir/test/Conversion/AMDGPUToROCDL/packed-trunc-invalid.mlir

diff --git a/mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp b/mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
index d0f7d2ba72361..e8f77d6c9f435 100644
--- a/mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
+++ b/mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
@@ -3046,6 +3046,9 @@ LogicalResult PackedTrunc2xFp8OpLowering::matchAndRewrite(
   else if (typeIsExpectedFp8ForChipset(chipset, resultElemType))
     result = ROCDL::CvtPkFp8F32Op::create(rewriter, loc, i32, sourceA, sourceB,
                                           existing, op.getWordIndex());
+  else
+    return op.emitOpError(
+        "no truncation to result type available on given chipset");
 
   result = rewriter.replaceOpWithNewOp<LLVM::BitcastOp>(
       op, getTypeConverter()->convertType(resultType), result);
@@ -3080,6 +3083,9 @@ LogicalResult PackedStochRoundFp8OpLowering::matchAndRewrite(
   else if (typeIsExpectedFp8ForChipset(chipset, resultElemType))
     result = ROCDL::CvtSrFp8F32Op::create(rewriter, loc, i32, source, stoch,
                                           existing, op.getStoreIndex());
+  else
+    return op.emitOpError(
+        "no stochastic rounding to result type available on given chipset");
 
   result = rewriter.replaceOpWithNewOp<LLVM::BitcastOp>(
       op, getTypeConverter()->convertType(resultType), result);
diff --git a/mlir/test/Conversion/AMDGPUToROCDL/packed-trunc-invalid.mlir b/mlir/test/Conversion/AMDGPUToROCDL/packed-trunc-invalid.mlir
new file mode 100644
index 0000000000000..93bfc60ce8f4b
--- /dev/null
+++ b/mlir/test/Conversion/AMDGPUToROCDL/packed-trunc-invalid.mlir
@@ -0,0 +1,18 @@
+// RUN: mlir-opt %s --convert-amdgpu-to-rocdl=chipset=gfx942 --split-input-file --verify-diagnostics
+
+func.func @packed_trunc_ocp_type_requires_ocp_chipset(%arg0: f32) {
+  // expected-error at below {{'amdgpu.packed_trunc_2xfp8' op no truncation to result type available on given chipset}}
+  // expected-error at below {{failed to legalize operation 'amdgpu.packed_trunc_2xfp8'}}
+  %0 = amdgpu.packed_trunc_2xfp8 %arg0, undef into undef[word 0] : f32 to vector<4xf8E4M3FN>
+  return
+}
+
+// -----
+
+func.func @packed_stoch_round_ocp_type_requires_ocp_chipset(%arg0: f32,
+                                                            %arg1: i32) {
+  // expected-error at below {{'amdgpu.packed_stoch_round_fp8' op no stochastic rounding to result type available on given chipset}}
+  // expected-error at below {{failed to legalize operation 'amdgpu.packed_stoch_round_fp8'}}
+  %0 = amdgpu.packed_stoch_round_fp8 %arg0 + %arg1 into undef[0] : f32 to vector<4xf8E4M3FN>
+  return
+}