[Mlir-commits] [mlir] [mlir][mem2reg] Promote whole-buffer memref to a vector SSA value (PR #211880)

llvmlistbot at llvm.org llvmlistbot at llvm.org
Wed Aug 12 21:48:58 PDT 2026


cr-zhao wrote:

Hi @Jianhui-Li, I noticed that vector.load / vector.store support is still listed as a limitation. I searched the existing PRs and didn’t find a follow-up for that part. Would it be useful for me to work on whole-buffer vector.load/store support as a follow-up once this PR lands?

https://github.com/llvm/llvm-project/pull/211880


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