[Mlir-commits] [mlir] [mlir][ArmSME] Enable native ArmSME integration testing on Darwin (PR #215296)
Federico Bruzzone
llvmlistbot at llvm.org
Wed Aug 12 00:58:46 PDT 2026
https://github.com/FedericoBruzzone updated https://github.com/llvm/llvm-project/pull/215296
>From bda21b50781be796d81ea910a2a6172c39f4593f Mon Sep 17 00:00:00 2001
From: Federico Bruzzone <federico.bruzzone.i at gmail.com>
Date: Mon, 10 Aug 2026 15:02:18 +0200
Subject: [PATCH 1/2] [mlir][ArmSME] Enable native ArmSME integration testing
on Darwin
Signed-off-by: Federico Bruzzone <federico.bruzzone.i at gmail.com>
---
.../modules/MLIRCheckHardwareFeatures.cmake | 48 ++++++++++++++++++-
.../Dialect/Linalg/CPU/ArmSME/fill-2d.mlir | 2 +-
.../Linalg/CPU/ArmSME/matmul-transpose-a.mlir | 2 +-
.../Dialect/Linalg/CPU/ArmSME/matmul.mlir | 2 +-
.../ArmSME/multi-tile-matmul-mixed-types.mlir | 2 +
.../Linalg/CPU/ArmSME/multi-tile-matmul.mlir | 2 +
.../Linalg/CPU/ArmSME/pack-unpack-mmt4d.mlir | 8 ++--
.../Linalg/CPU/ArmSME/use-too-many-tiles.mlir | 2 +-
.../CPU/ArmSME/load-store-128-bit-tile.mlir | 4 +-
.../Vector/CPU/ArmSME/load-vertical.mlir | 2 +-
.../CPU/ArmSME/multi-tile-transpose.mlir | 2 +
.../CPU/ArmSME/outerproduct-f16f16f32.mlir | 2 +
.../Vector/CPU/ArmSME/outerproduct-f32.mlir | 2 +-
.../Vector/CPU/ArmSME/outerproduct-f64.mlir | 2 +-
.../CPU/ArmSME/outerproduct-i8i8i32.mlir | 2 +
.../Dialect/Vector/CPU/ArmSME/ssve.mlir | 4 +-
.../Dialect/Vector/CPU/ArmSME/tile-fill.mlir | 2 +-
.../Vector/CPU/ArmSME/transfer-read-2d.mlir | 2 +-
.../Vector/CPU/ArmSME/transfer-write-2d.mlir | 2 +-
.../Dialect/Vector/CPU/ArmSME/transpose.mlir | 2 +-
.../Vector/CPU/ArmSME/vector-load-store.mlir | 2 +-
.../Dialect/Vector/CPU/ArmSME/vector-ops.mlir | 2 +-
22 files changed, 77 insertions(+), 23 deletions(-)
diff --git a/mlir/cmake/modules/MLIRCheckHardwareFeatures.cmake b/mlir/cmake/modules/MLIRCheckHardwareFeatures.cmake
index 7bc13287cd655..73cde69648911 100644
--- a/mlir/cmake/modules/MLIRCheckHardwareFeatures.cmake
+++ b/mlir/cmake/modules/MLIRCheckHardwareFeatures.cmake
@@ -2,8 +2,46 @@
# the moment these are used when configuring MLIR integration tests.
# Checks whether the specified hardware capability is supported by the host
-# Linux system. This is implemented by checking auxiliary vector feature
-# provided by the Linux kernel.
+# Darwin (macOS) system. This is implemented via `sysctl`, which is the
+# Darwin equivalent of Linux's auxiliary vector feature bits. Only the
+# mappings actually needed by callers in this file are provided; unmapped
+# hwcap_spec values conservatively report unsupported.
+#
+# check_hwcap_darwin(
+# hwcap_spec
+# output_var
+# )
+function(check_hwcap_darwin hwcap_spec output)
+ if(hwcap_spec STREQUAL "HWCAP2_SME")
+ set(sysctl_name "hw.optional.arm.FEAT_SME")
+ else()
+ message(STATUS "Checking whether ${hwcap_spec} is supported by the host system: FALSE (no Darwin mapping)")
+ set(${output} FALSE PARENT_SCOPE)
+ return()
+ endif()
+
+ execute_process(
+ COMMAND sysctl -n ${sysctl_name}
+ OUTPUT_VARIABLE sysctl_output
+ OUTPUT_STRIP_TRAILING_WHITESPACE
+ ERROR_QUIET
+ RESULT_VARIABLE sysctl_result
+ )
+
+ if(sysctl_result EQUAL 0 AND sysctl_output STREQUAL "1")
+ set(local_result TRUE)
+ else()
+ set(local_result FALSE)
+ endif()
+ message(STATUS "Checking whether ${hwcap_spec} is supported by the host system (via sysctl ${sysctl_name}): ${local_result}")
+ set(${output} ${local_result} PARENT_SCOPE)
+endfunction(check_hwcap_darwin)
+
+# Checks whether the specified hardware capability is supported by the host
+# system. On Linux this is implemented by checking auxiliary vector feature
+# provided by the Linux kernel. On Darwin (macOS) this is implemented via
+# `sysctl` (see check_hwcap_darwin). On other platforms this conservatively
+# reports unsupported.
#
# check_hwcap(
# hwcap_spec
@@ -21,6 +59,12 @@
# check_hwcap("HWCAP2_SME" SME_EMULATOR_REQUIRED)
#
function(check_hwcap hwcap_spec output)
+ if(APPLE)
+ check_hwcap_darwin(${hwcap_spec} local_output)
+ set(${output} ${local_output} PARENT_SCOPE)
+ return()
+ endif()
+
set(hwcap_test_src
[====[
#include <asm/hwcap.h>
diff --git a/mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/fill-2d.mlir b/mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/fill-2d.mlir
index ed4342b7d50af..f323070157ceb 100644
--- a/mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/fill-2d.mlir
+++ b/mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/fill-2d.mlir
@@ -5,7 +5,7 @@
// RUN: -test-lower-to-arm-sme -test-lower-to-llvm | \
// RUN: %mcr_aarch64_cmd \
// RUN: -e=entry -entry-point-result=void \
-// RUN: -march=aarch64 -mattr="+sve,+sme" \
+// RUN: -march=aarch64 -mattr="+sme" \
// RUN: -shared-libs=%native_mlir_runner_utils,%native_mlir_c_runner_utils,%native_arm_sme_abi_shlib | \
// RUN: FileCheck %s
diff --git a/mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/matmul-transpose-a.mlir b/mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/matmul-transpose-a.mlir
index d26853d14aec7..ba8e59ae779f5 100644
--- a/mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/matmul-transpose-a.mlir
+++ b/mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/matmul-transpose-a.mlir
@@ -4,7 +4,7 @@
// RUN: -test-lower-to-arm-sme -test-lower-to-llvm | \
// RUN: %mcr_aarch64_cmd \
// RUN: -e=main -entry-point-result=void \
-// RUN: -march=aarch64 -mattr="+sve,+sme" \
+// RUN: -march=aarch64 -mattr="+sme" \
// RUN: -shared-libs=%native_mlir_runner_utils,%native_mlir_c_runner_utils,%native_arm_sme_abi_shlib | \
// RUN: FileCheck %s
diff --git a/mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/matmul.mlir b/mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/matmul.mlir
index e2c0f1d22fea1..ee82178ca63a4 100644
--- a/mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/matmul.mlir
+++ b/mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/matmul.mlir
@@ -3,7 +3,7 @@
// RUN: -test-lower-to-arm-sme -test-lower-to-llvm | \
// RUN: %mcr_aarch64_cmd \
// RUN: -e=main -entry-point-result=void \
-// RUN: -march=aarch64 -mattr="+sve,+sme" \
+// RUN: -march=aarch64 -mattr="+sme" \
// RUN: -shared-libs=%native_mlir_runner_utils,%native_mlir_c_runner_utils,%native_arm_sme_abi_shlib | \
// RUN: FileCheck %s
diff --git a/mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/multi-tile-matmul-mixed-types.mlir b/mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/multi-tile-matmul-mixed-types.mlir
index 71798a6affbbc..f6413721f6f04 100644
--- a/mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/multi-tile-matmul-mixed-types.mlir
+++ b/mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/multi-tile-matmul-mixed-types.mlir
@@ -1,3 +1,5 @@
+// REQUIRES: arm-emulator
+
// RUN: mlir-opt %s \
// RUN: -transform-interpreter -test-transform-dialect-erase-schedule \
// RUN: -one-shot-bufferize="bufferize-function-boundaries" -canonicalize \
diff --git a/mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/multi-tile-matmul.mlir b/mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/multi-tile-matmul.mlir
index 207d29858be52..1f364ea325b41 100644
--- a/mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/multi-tile-matmul.mlir
+++ b/mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/multi-tile-matmul.mlir
@@ -1,3 +1,5 @@
+// REQUIRES: arm-emulator
+
// RUN: mlir-opt %s \
// RUN: -transform-interpreter -test-transform-dialect-erase-schedule \
// RUN: -one-shot-bufferize="bufferize-function-boundaries" -canonicalize \
diff --git a/mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/pack-unpack-mmt4d.mlir b/mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/pack-unpack-mmt4d.mlir
index 73e286f960008..eb1e7a87d932f 100644
--- a/mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/pack-unpack-mmt4d.mlir
+++ b/mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/pack-unpack-mmt4d.mlir
@@ -123,7 +123,7 @@ func.func private @matmul(%A: tensor<7x16xf32>, %B: tensor<16x13xf32>, %C: tenso
// Implements packing for the A matrix (LHS) in matrix multiplication. The
// inner tile size for dim M is "scalable": 8 * vscale.
//===----------------------------------------------------------------------===//
-func.func private @pack_lhs(%A: tensor<7x16xf32>) -> tensor<1x16x?x1xf32> {
+func.func private @pack_lhs(%A: tensor<7x16xf32>) -> tensor<1x16x?x1xf32> attributes {llvm.arm_streaming} {
%pad = arith.constant 0.0 : f32
%vs = vector.vscale
@@ -146,7 +146,7 @@ func.func private @pack_lhs(%A: tensor<7x16xf32>) -> tensor<1x16x?x1xf32> {
// Implements packing for the B matrix (RHS) in matrix multiplication. The
// inner tile size for dim N is "scalable": 8 * vscale.
//===----------------------------------------------------------------------===//
-func.func private @pack_rhs(%B: tensor<16x13xf32>) -> tensor<?x16x?x1xf32> {
+func.func private @pack_rhs(%B: tensor<16x13xf32>) -> tensor<?x16x?x1xf32> attributes {llvm.arm_streaming} {
%pad = arith.constant 0.0 : f32
// Compute the outer tile size.
@@ -173,7 +173,7 @@ func.func private @pack_rhs(%B: tensor<16x13xf32>) -> tensor<?x16x?x1xf32> {
// Implements packing for the C matrix (accumulator) in matrix multiplication.
// The inner tile sizes are "scalable": 8 * vscale, 8 * vscale
//===----------------------------------------------------------------------===//
-func.func private @pack_acc(%C: tensor<7x13xf32>) -> tensor<1x?x?x?xf32> {
+func.func private @pack_acc(%C: tensor<7x13xf32>) -> tensor<1x?x?x?xf32> attributes {llvm.arm_streaming} {
%pad = arith.constant 0.0 : f32
// Compute the outer tile size.
@@ -199,7 +199,7 @@ func.func private @pack_acc(%C: tensor<7x13xf32>) -> tensor<1x?x?x?xf32> {
// Implements unpacking for the C matrix (accumulator) in matrix
// multiplication. The inner tile sizes are "scalable": 8 * vscale, 8 * vscale
//===----------------------------------------------------------------------===//
-func.func private @unpack_acc(%C_packed: tensor<1x?x?x?xf32>) -> tensor<7x13xf32> {
+func.func private @unpack_acc(%C_packed: tensor<1x?x?x?xf32>) -> tensor<7x13xf32> attributes {llvm.arm_streaming} {
%vs = vector.vscale
%c8 = arith.constant 8 : index
%vs_c8 = arith.muli %vs, %c8 : index
diff --git a/mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/use-too-many-tiles.mlir b/mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/use-too-many-tiles.mlir
index 05eee31ccc6fa..abf0f6a2740c4 100644
--- a/mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/use-too-many-tiles.mlir
+++ b/mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/use-too-many-tiles.mlir
@@ -2,7 +2,7 @@
// RUN: -test-lower-to-arm-sme -test-lower-to-llvm -verify-diagnostics | \
// RUN: %mcr_aarch64_cmd \
// RUN: -e=main -entry-point-result=void \
-// RUN: -march=aarch64 -mattr="+sve,+sme" \
+// RUN: -march=aarch64 -mattr="+sme" \
// RUN: -shared-libs=%native_mlir_runner_utils,%native_mlir_c_runner_utils,%native_arm_sme_abi_shlib | \
// RUN: FileCheck %s
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/load-store-128-bit-tile.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/load-store-128-bit-tile.mlir
index f4275fdde3c78..11d0df993da00 100644
--- a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/load-store-128-bit-tile.mlir
+++ b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/load-store-128-bit-tile.mlir
@@ -1,7 +1,7 @@
// DEFINE: %{entry_point} = test_load_store_zaq0
// DEFINE: %{compile} = mlir-opt %s -test-lower-to-arm-sme -test-lower-to-llvm
// DEFINE: %{run} = %mcr_aarch64_cmd \
-// DEFINE: -march=aarch64 -mattr=+sve,+sme \
+// DEFINE: -march=aarch64 -mattr=+sme \
// DEFINE: -e %{entry_point} -entry-point-result=void \
// DEFINE: -shared-libs=%native_mlir_runner_utils,%native_mlir_c_runner_utils,%native_arm_sme_abi_shlib
@@ -24,7 +24,7 @@ func.func @vector_copy_i128(%src: memref<?x?xi128>, %dst: memref<?x?xi128>) {
return
}
-func.func @test_load_store_zaq0() {
+func.func @test_load_store_zaq0() attributes {llvm.arm_locally_streaming} {
%c0 = arith.constant 0 : index
%min_elts_q = arith.constant 1 : index
%bytes_per_128_bit = arith.constant 16 : index
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/load-vertical.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/load-vertical.mlir
index 8d4b4a07994e2..74726c4c62780 100644
--- a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/load-vertical.mlir
+++ b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/load-vertical.mlir
@@ -1,7 +1,7 @@
// DEFINE: %{entry_point} = entry
// DEFINE: %{compile} = mlir-opt %s -test-lower-to-arm-sme -test-lower-to-llvm
// DEFINE: %{run} = %mcr_aarch64_cmd \
-// DEFINE: -march=aarch64 -mattr=+sve,+sme \
+// DEFINE: -march=aarch64 -mattr=+sme \
// DEFINE: -e %{entry_point} -entry-point-result=void \
// DEFINE: -shared-libs=%native_mlir_runner_utils,%native_mlir_c_runner_utils,%native_arm_sme_abi_shlib
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/multi-tile-transpose.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/multi-tile-transpose.mlir
index 7f1566d635cbb..e8294c7620722 100644
--- a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/multi-tile-transpose.mlir
+++ b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/multi-tile-transpose.mlir
@@ -1,3 +1,5 @@
+// REQUIRES: arm-emulator
+
// RUN: mlir-opt %s -test-lower-to-arm-sme -test-lower-to-llvm | \
// RUN: %mcr_aarch64_cmd \
// RUN: -e=main -entry-point-result=void \
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/outerproduct-f16f16f32.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/outerproduct-f16f16f32.mlir
index 886a990125b4c..123d6bd1ed672 100644
--- a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/outerproduct-f16f16f32.mlir
+++ b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/outerproduct-f16f16f32.mlir
@@ -1,3 +1,5 @@
+// REQUIRES: arm-emulator
+
// DEFINE: %{opts} =
// DEFINE: %{entry} = main
// DEFINE: %{compile} = mlir-opt %s \
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/outerproduct-f32.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/outerproduct-f32.mlir
index 219367a41d51a..6320a1f33697d 100644
--- a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/outerproduct-f32.mlir
+++ b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/outerproduct-f32.mlir
@@ -2,7 +2,7 @@
// DEFINE: %{compile} = mlir-opt %s \
// DEFINE: -test-lower-to-arm-sme -test-lower-to-llvm -o %t
// DEFINE: %{run} = %mcr_aarch64_cmd %t \
-// DEFINE: -march=aarch64 -mattr=+sve,+sme \
+// DEFINE: -march=aarch64 -mattr=+sme \
// DEFINE: -e %{entry_point} -entry-point-result=void \
// DEFINE: -shared-libs=%native_mlir_runner_utils,%native_mlir_c_runner_utils,%native_arm_sme_abi_shlib
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/outerproduct-f64.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/outerproduct-f64.mlir
index 059f24adbe721..232a2449e2498 100644
--- a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/outerproduct-f64.mlir
+++ b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/outerproduct-f64.mlir
@@ -2,7 +2,7 @@
// DEFINE: %{compile} = mlir-opt %s \
// DEFINE: -test-lower-to-arm-sme -test-lower-to-llvm -o %t
// DEFINE: %{run} = %mcr_aarch64_cmd %t \
-// DEFINE: -march=aarch64 -mattr=+sve,+sme-f64f64 \
+// DEFINE: -march=aarch64 -mattr=+sme,+sme-f64f64 \
// DEFINE: -e %{entry_point} -entry-point-result=void \
// DEFINE: -shared-libs=%native_mlir_runner_utils,%native_mlir_c_runner_utils,%native_arm_sme_abi_shlib
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/outerproduct-i8i8i32.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/outerproduct-i8i8i32.mlir
index 74ddbc63380b7..1515672057d33 100644
--- a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/outerproduct-i8i8i32.mlir
+++ b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/outerproduct-i8i8i32.mlir
@@ -1,3 +1,5 @@
+// REQUIRES: arm-emulator
+
// DEFINE: %{entry} = main
// DEFINE: %{compile} = mlir-opt %s -test-lower-to-arm-sme -test-lower-to-llvm
// DEFINE: %{run} = %mcr_aarch64_cmd \
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/ssve.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/ssve.mlir
index aa8a2aa45d65b..a3a7eaab7bd52 100644
--- a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/ssve.mlir
+++ b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/ssve.mlir
@@ -1,7 +1,7 @@
// DEFINE: %{entry_point} = entry
// DEFINE: %{compile} = mlir-opt %s -test-lower-to-llvm
// DEFINE: %{run} = %mcr_aarch64_cmd \
-// DEFINE: -march=aarch64 -mattr=+sve,+sme \
+// DEFINE: -march=aarch64 -mattr=+sme \
// DEFINE: -e %{entry_point} -entry-point-result=i32 \
// DEFINE: -shared-libs=%native_mlir_runner_utils,%native_mlir_c_runner_utils
@@ -10,7 +10,7 @@
// RUN: %{compile} | %{run} | FileCheck %s
// VLA memcopy in streaming mode.
-func.func @streaming_kernel_copy(%src : memref<?xi64>, %dst : memref<?xi64>, %size : index) attributes {arm_streaming} {
+func.func @streaming_kernel_copy(%src : memref<?xi64>, %dst : memref<?xi64>, %size : index) attributes {llvm.arm_streaming} {
%c0 = arith.constant 0 : index
%c2 = arith.constant 2 : index
%vscale = vector.vscale
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/tile-fill.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/tile-fill.mlir
index b94345c70c713..fcef062dd18ac 100644
--- a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/tile-fill.mlir
+++ b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/tile-fill.mlir
@@ -1,6 +1,6 @@
// RUN: mlir-opt %s -test-lower-to-arm-sme -test-lower-to-llvm | \
// RUN: %mcr_aarch64_cmd \
-// RUN: -march=aarch64 -mattr=+sve,+sme \
+// RUN: -march=aarch64 -mattr=+sme \
// RUN: -e entry -entry-point-result=i32 \
// RUN: -shared-libs=%native_mlir_runner_utils,%native_mlir_c_runner_utils,%native_arm_sme_abi_shlib | \
// RUN: FileCheck %s
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/transfer-read-2d.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/transfer-read-2d.mlir
index 77f5a325728b3..fa65e03abb4bc 100644
--- a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/transfer-read-2d.mlir
+++ b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/transfer-read-2d.mlir
@@ -1,7 +1,7 @@
// DEFINE: %{entry_point} = entry
// DEFINE: %{compile} = mlir-opt %s -test-lower-to-arm-sme -test-lower-to-llvm
// DEFINE: %{run} = %mcr_aarch64_cmd \
-// DEFINE: -march=aarch64 -mattr=+sve,+sme \
+// DEFINE: -march=aarch64 -mattr=+sme \
// DEFINE: -e %{entry_point} -entry-point-result=void \
// DEFINE: -shared-libs=%native_mlir_runner_utils,%native_mlir_c_runner_utils,%native_arm_sme_abi_shlib
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/transfer-write-2d.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/transfer-write-2d.mlir
index bf6900ca810c2..7d55f6036a66f 100644
--- a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/transfer-write-2d.mlir
+++ b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/transfer-write-2d.mlir
@@ -1,7 +1,7 @@
// DEFINE: %{entry_point} = entry
// DEFINE: %{compile} = mlir-opt %s -test-lower-to-arm-sme -test-lower-to-llvm
// DEFINE: %{run} = %mcr_aarch64_cmd \
-// DEFINE: -march=aarch64 -mattr=+sve,+sme \
+// DEFINE: -march=aarch64 -mattr=+sme \
// DEFINE: -e %{entry_point} -entry-point-result=void \
// DEFINE: -shared-libs=%native_mlir_runner_utils,%native_mlir_c_runner_utils,%native_arm_sme_abi_shlib
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/transpose.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/transpose.mlir
index 8188e66ce0662..14dc38f2a0aa1 100644
--- a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/transpose.mlir
+++ b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/transpose.mlir
@@ -1,7 +1,7 @@
// DEFINE: %{entry_point} = entry
// DEFINE: %{compile} = mlir-opt %s -test-lower-to-arm-sme -test-lower-to-llvm
// DEFINE: %{run} = %mcr_aarch64_cmd \
-// DEFINE: -march=aarch64 -mattr=+sve,+sme \
+// DEFINE: -march=aarch64 -mattr=+sme \
// DEFINE: -e %{entry_point} -entry-point-result=void \
// DEFINE: -shared-libs=%native_mlir_runner_utils,%native_mlir_c_runner_utils,%native_arm_sme_abi_shlib
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/vector-load-store.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/vector-load-store.mlir
index eb9988666f4e5..e4c737a8af8a6 100644
--- a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/vector-load-store.mlir
+++ b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/vector-load-store.mlir
@@ -1,7 +1,7 @@
// DEFINE: %{entry_point} = za0_d_f64
// DEFINE: %{compile} = mlir-opt %s -test-lower-to-arm-sme -test-lower-to-llvm
// DEFINE: %{run} = %mcr_aarch64_cmd \
-// DEFINE: -march=aarch64 -mattr=+sve,+sme \
+// DEFINE: -march=aarch64 -mattr=+sme \
// DEFINE: -e %{entry_point} -entry-point-result=i32 \
// DEFINE: -shared-libs=%native_mlir_runner_utils,%native_mlir_c_runner_utils,%native_arm_sme_abi_shlib
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/vector-ops.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/vector-ops.mlir
index ad8e321c0c8ae..eba3b50b016e5 100644
--- a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/vector-ops.mlir
+++ b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/vector-ops.mlir
@@ -1,7 +1,7 @@
// DEFINE: %{entry_point} = entry
// DEFINE: %{compile} = mlir-opt %s -test-lower-to-arm-sme -test-lower-to-llvm
// DEFINE: %{run} = %mcr_aarch64_cmd \
-// DEFINE: -march=aarch64 -mattr=+sve,+sme \
+// DEFINE: -march=aarch64 -mattr=+sme \
// DEFINE: -e %{entry_point} -entry-point-result=i32 \
// DEFINE: -shared-libs=%native_mlir_runner_utils,%native_mlir_c_runner_utils,%native_arm_sme_abi_shlib
>From 38edcacbc091a8ebb5013a7dd21fb5ed4899f3c2 Mon Sep 17 00:00:00 2001
From: Federico Bruzzone <federico.bruzzone.i at gmail.com>
Date: Wed, 12 Aug 2026 09:58:07 +0200
Subject: [PATCH 2/2] Address comments
Signed-off-by: Federico Bruzzone <federico.bruzzone.i at gmail.com>
---
.../modules/MLIRCheckHardwareFeatures.cmake | 50 ++++++++-----------
1 file changed, 20 insertions(+), 30 deletions(-)
diff --git a/mlir/cmake/modules/MLIRCheckHardwareFeatures.cmake b/mlir/cmake/modules/MLIRCheckHardwareFeatures.cmake
index 73cde69648911..3aea591d885f7 100644
--- a/mlir/cmake/modules/MLIRCheckHardwareFeatures.cmake
+++ b/mlir/cmake/modules/MLIRCheckHardwareFeatures.cmake
@@ -1,27 +1,16 @@
# A collection of helper CMake functions to detect hardware capabilities. At
# the moment these are used when configuring MLIR integration tests.
-# Checks whether the specified hardware capability is supported by the host
-# Darwin (macOS) system. This is implemented via `sysctl`, which is the
-# Darwin equivalent of Linux's auxiliary vector feature bits. Only the
-# mappings actually needed by callers in this file are provided; unmapped
-# hwcap_spec values conservatively report unsupported.
+# Checks whether SME is supported by the host Darwin (macOS) system. This is
+# implemented via `sysctl`, since Darwin has no equivalent of Linux's
+# auxiliary vector feature bits (hwcap).
#
-# check_hwcap_darwin(
-# hwcap_spec
+# check_sme_support_on_darwin(
# output_var
# )
-function(check_hwcap_darwin hwcap_spec output)
- if(hwcap_spec STREQUAL "HWCAP2_SME")
- set(sysctl_name "hw.optional.arm.FEAT_SME")
- else()
- message(STATUS "Checking whether ${hwcap_spec} is supported by the host system: FALSE (no Darwin mapping)")
- set(${output} FALSE PARENT_SCOPE)
- return()
- endif()
-
+function(check_sme_support_on_darwin output)
execute_process(
- COMMAND sysctl -n ${sysctl_name}
+ COMMAND sysctl -n hw.optional.arm.FEAT_SME
OUTPUT_VARIABLE sysctl_output
OUTPUT_STRIP_TRAILING_WHITESPACE
ERROR_QUIET
@@ -33,15 +22,13 @@ function(check_hwcap_darwin hwcap_spec output)
else()
set(local_result FALSE)
endif()
- message(STATUS "Checking whether ${hwcap_spec} is supported by the host system (via sysctl ${sysctl_name}): ${local_result}")
+ message(STATUS "Checking whether SME is supported by the host system (via sysctl hw.optional.arm.FEAT_SME): ${local_result}")
set(${output} ${local_result} PARENT_SCOPE)
-endfunction(check_hwcap_darwin)
+endfunction(check_sme_support_on_darwin)
# Checks whether the specified hardware capability is supported by the host
-# system. On Linux this is implemented by checking auxiliary vector feature
-# provided by the Linux kernel. On Darwin (macOS) this is implemented via
-# `sysctl` (see check_hwcap_darwin). On other platforms this conservatively
-# reports unsupported.
+# Linux system. This is implemented by checking auxiliary vector feature
+# provided by the Linux kernel.
#
# check_hwcap(
# hwcap_spec
@@ -59,12 +46,6 @@ endfunction(check_hwcap_darwin)
# check_hwcap("HWCAP2_SME" SME_EMULATOR_REQUIRED)
#
function(check_hwcap hwcap_spec output)
- if(APPLE)
- check_hwcap_darwin(${hwcap_spec} local_output)
- set(${output} ${local_output} PARENT_SCOPE)
- return()
- endif()
-
set(hwcap_test_src
[====[
#include <asm/hwcap.h>
@@ -132,7 +113,16 @@ function(check_emulator mlir_e2e_tests hwcap_spec emulator_exec)
return()
endif()
- check_hwcap(${hwcap_spec} emulator_not_required)
+ if(APPLE AND hwcap_spec STREQUAL "HWCAP2_SME")
+ check_sme_support_on_darwin(emulator_not_required)
+ elseif(APPLE)
+ # No Darwin mapping for anything other than SME (yet); conservatively
+ # assume an emulator is required.
+ set(emulator_not_required FALSE)
+ else()
+ check_hwcap(${hwcap_spec} emulator_not_required)
+ endif()
+
if (${emulator_not_required})
return()
endif()
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