[Mlir-commits] [mlir] [mlir][tosa] Change CONV2D type combinations for BF16 & FP16 output (PR #215611)
Jeremy Johnson
llvmlistbot at llvm.org
Tue Aug 11 09:49:42 PDT 2026
https://github.com/jjohnson-arm created https://github.com/llvm/llvm-project/pull/215611
Note that this implements the TOSA specification change: https://github.com/arm/tosa-specification/pull/77
>From a4b6a60565bff2e6f9447a41765ca561719ee3c3 Mon Sep 17 00:00:00 2001
From: Jeremy Johnson <jeremy.johnson at arm.com>
Date: Tue, 11 Aug 2026 13:16:40 +0100
Subject: [PATCH] [mlir][tosa] Change CONV2D type combinations for BF16 & FP16
output
Signed-off-by: Jeremy Johnson <jeremy.johnson at arm.com>
Change-Id: I46c28df78a98fea55d3da0aad03031560b5f2b3e
---
.../Dialect/Tosa/IR/TosaComplianceData.h.inc | 1184 +++++++++++------
mlir/test/Dialect/Tosa/invalid_extension.mlir | 6 +-
.../tosa-validation-version-1p0-invalid.mlir | 6 +-
.../tosa-validation-version-1p1-valid.mlir | 2 +-
4 files changed, 782 insertions(+), 416 deletions(-)
diff --git a/mlir/include/mlir/Dialect/Tosa/IR/TosaComplianceData.h.inc b/mlir/include/mlir/Dialect/Tosa/IR/TosaComplianceData.h.inc
index 628f68924e007..8b0eb071285cc 100644
--- a/mlir/include/mlir/Dialect/Tosa/IR/TosaComplianceData.h.inc
+++ b/mlir/include/mlir/Dialect/Tosa/IR/TosaComplianceData.h.inc
@@ -615,10 +615,16 @@ extensionComplianceMap = {
{{Extension::fp8e4m3},
{{{fp8e4m3T, fp8e4m3T, fp16T, fp8e4m3T, fp8e4m3T, fp16T, fp16T},
SpecificationVersion::V_1_0},
+ {{fp8e4m3T, fp8e4m3T, fp16T, fp8e4m3T, fp8e4m3T, fp16T, fp16T},
+ SpecificationVersion::V_1_1_DRAFT},
{{fp8e4m3T, fp8e4m3T, fp16T, fp8e4m3T, fp8e4m3T, fp32T, fp16T},
SpecificationVersion::V_1_1_DRAFT},
+ {{fp8e4m3T, fp16T, fp16T, fp8e4m3T, fp16T, fp16T, fp16T},
+ SpecificationVersion::V_1_1_DRAFT},
{{fp8e4m3T, fp16T, fp16T, fp8e4m3T, fp16T, fp32T, fp16T},
SpecificationVersion::V_1_1_DRAFT},
+ {{fp16T, fp8e4m3T, fp16T, fp16T, fp8e4m3T, fp16T, fp16T},
+ SpecificationVersion::V_1_1_DRAFT},
{{fp16T, fp8e4m3T, fp16T, fp16T, fp8e4m3T, fp32T, fp16T},
SpecificationVersion::V_1_1_DRAFT},
{{fp8e4m3T, fp8e4m3T, fp32T, fp8e4m3T, fp8e4m3T, fp32T, fp32T},
@@ -634,10 +640,16 @@ extensionComplianceMap = {
{{Extension::fp8e5m2},
{{{fp8e5m2T, fp8e5m2T, fp16T, fp8e5m2T, fp8e5m2T, fp16T, fp16T},
SpecificationVersion::V_1_0},
+ {{fp8e5m2T, fp8e5m2T, fp16T, fp8e5m2T, fp8e5m2T, fp16T, fp16T},
+ SpecificationVersion::V_1_1_DRAFT},
{{fp8e5m2T, fp8e5m2T, fp16T, fp8e5m2T, fp8e5m2T, fp32T, fp16T},
SpecificationVersion::V_1_1_DRAFT},
+ {{fp8e5m2T, fp16T, fp16T, fp8e5m2T, fp16T, fp16T, fp16T},
+ SpecificationVersion::V_1_1_DRAFT},
{{fp8e5m2T, fp16T, fp16T, fp8e5m2T, fp16T, fp32T, fp16T},
SpecificationVersion::V_1_1_DRAFT},
+ {{fp16T, fp8e5m2T, fp16T, fp16T, fp8e5m2T, fp16T, fp16T},
+ SpecificationVersion::V_1_1_DRAFT},
{{fp16T, fp8e5m2T, fp16T, fp16T, fp8e5m2T, fp32T, fp16T},
SpecificationVersion::V_1_1_DRAFT},
{{fp8e5m2T, fp8e5m2T, fp32T, fp8e5m2T, fp8e5m2T, fp32T, fp32T},
@@ -653,19 +665,9 @@ extensionComplianceMap = {
{{Extension::bf16},
{{{bf16T, bf16T, bf16T, bf16T, bf16T, fp32T, bf16T},
SpecificationVersion::V_1_0},
- {{fp16T, fp16T, fp16T, fp16T, fp16T, bf16T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{fp16T, bf16T, fp16T, fp16T, bf16T, bf16T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{fp16T, bf16T, fp16T, fp16T, bf16T, fp32T, fp16T},
+ {{bf16T, bf16T, bf16T, bf16T, bf16T, bf16T, bf16T},
SpecificationVersion::V_1_1_DRAFT},
- {{bf16T, fp16T, fp16T, bf16T, fp16T, bf16T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{bf16T, fp16T, fp16T, bf16T, fp16T, fp32T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{bf16T, bf16T, fp16T, bf16T, bf16T, bf16T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{bf16T, bf16T, fp16T, bf16T, bf16T, fp32T, fp16T},
+ {{bf16T, bf16T, bf16T, bf16T, bf16T, fp32T, bf16T},
SpecificationVersion::V_1_1_DRAFT},
{{fp16T, bf16T, fp32T, fp16T, bf16T, fp32T, fp32T},
SpecificationVersion::V_1_1_DRAFT},
@@ -677,34 +679,12 @@ extensionComplianceMap = {
SpecificationVersion::V_1_1_DRAFT},
{{fp32T, bf16T, fp32T, fp32T, bf16T, fp32T, fp32T},
SpecificationVersion::V_1_1_DRAFT}}},
- {{Extension::bf16, Extension::fp8e4m3},
- {{{fp8e4m3T, fp8e4m3T, fp16T, fp8e4m3T, fp8e4m3T, bf16T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{fp8e4m3T, fp16T, fp16T, fp8e4m3T, fp16T, bf16T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{fp8e4m3T, bf16T, fp16T, fp8e4m3T, bf16T, bf16T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{fp8e4m3T, bf16T, fp16T, fp8e4m3T, bf16T, fp32T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{fp16T, fp8e4m3T, fp16T, fp16T, fp8e4m3T, bf16T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{bf16T, fp8e4m3T, fp16T, bf16T, fp8e4m3T, bf16T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{bf16T, fp8e4m3T, fp16T, bf16T, fp8e4m3T, fp32T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{fp8e4m3T, bf16T, fp32T, fp8e4m3T, bf16T, fp32T, fp32T},
+ {{Extension::fp8e4m3, Extension::fp8e5m2},
+ {{{fp8e4m3T, fp8e5m2T, fp16T, fp8e4m3T, fp8e5m2T, fp16T, fp16T},
SpecificationVersion::V_1_1_DRAFT},
- {{bf16T, fp8e4m3T, fp32T, bf16T, fp8e4m3T, fp32T, fp32T},
- SpecificationVersion::V_1_1_DRAFT}},
- allOf},
- {{Extension::bf16, Extension::fp8e4m3, Extension::fp8e5m2},
- {{{fp8e4m3T, fp8e5m2T, fp16T, fp8e4m3T, fp8e5m2T, bf16T, fp16T},
+ {{fp8e4m3T, fp8e5m2T, fp16T, fp8e4m3T, fp8e5m2T, fp32T, fp16T},
SpecificationVersion::V_1_1_DRAFT},
- {{fp8e5m2T, fp8e4m3T, fp16T, fp8e5m2T, fp8e4m3T, bf16T, fp16T},
- SpecificationVersion::V_1_1_DRAFT}},
- allOf},
- {{Extension::fp8e4m3, Extension::fp8e5m2},
- {{{fp8e4m3T, fp8e5m2T, fp16T, fp8e4m3T, fp8e5m2T, fp32T, fp16T},
+ {{fp8e5m2T, fp8e4m3T, fp16T, fp8e5m2T, fp8e4m3T, fp16T, fp16T},
SpecificationVersion::V_1_1_DRAFT},
{{fp8e5m2T, fp8e4m3T, fp16T, fp8e5m2T, fp8e4m3T, fp32T, fp16T},
SpecificationVersion::V_1_1_DRAFT},
@@ -713,17 +693,14 @@ extensionComplianceMap = {
{{fp8e5m2T, fp8e4m3T, fp32T, fp8e5m2T, fp8e4m3T, fp32T, fp32T},
SpecificationVersion::V_1_1_DRAFT}},
allOf},
- {{Extension::bf16, Extension::fp8e4m3, Extension::mx_common,
- Extension::mx_fp8e4m3},
- {{{fp8e4m3T, bs32_fp8ue8m0_fp8e4m3T, fp16T, fp8e4m3T, fp32T, bf16T,
+ {{Extension::fp8e4m3, Extension::mx_common, Extension::mx_fp8e4m3},
+ {{{fp8e4m3T, bs32_fp8ue8m0_fp8e4m3T, fp16T, fp8e4m3T, fp32T, fp16T,
fp16T},
SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp8e4m3T, fp8e4m3T, fp16T, fp32T, fp8e4m3T, bf16T,
+ {{fp8e4m3T, bs32_fp8ue8m0_fp8e4m3T, fp16T, fp8e4m3T, fp32T, fp32T,
fp16T},
- SpecificationVersion::V_1_1_DRAFT}},
- allOf},
- {{Extension::fp8e4m3, Extension::mx_common, Extension::mx_fp8e4m3},
- {{{fp8e4m3T, bs32_fp8ue8m0_fp8e4m3T, fp16T, fp8e4m3T, fp32T, fp32T,
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp8e4m3T, fp8e4m3T, fp16T, fp32T, fp8e4m3T, fp16T,
fp16T},
SpecificationVersion::V_1_1_DRAFT},
{{bs32_fp8ue8m0_fp8e4m3T, fp8e4m3T, fp16T, fp32T, fp8e4m3T, fp32T,
@@ -736,17 +713,14 @@ extensionComplianceMap = {
fp32T},
SpecificationVersion::V_1_1_DRAFT}},
allOf},
- {{Extension::bf16, Extension::fp8e4m3, Extension::mx_common,
- Extension::mx_fp8e5m2},
- {{{fp8e4m3T, bs32_fp8ue8m0_fp8e5m2T, fp16T, fp8e4m3T, fp32T, bf16T,
+ {{Extension::fp8e4m3, Extension::mx_common, Extension::mx_fp8e5m2},
+ {{{fp8e4m3T, bs32_fp8ue8m0_fp8e5m2T, fp16T, fp8e4m3T, fp32T, fp16T,
fp16T},
SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp8e5m2T, fp8e4m3T, fp16T, fp32T, fp8e4m3T, bf16T,
+ {{fp8e4m3T, bs32_fp8ue8m0_fp8e5m2T, fp16T, fp8e4m3T, fp32T, fp32T,
fp16T},
- SpecificationVersion::V_1_1_DRAFT}},
- allOf},
- {{Extension::fp8e4m3, Extension::mx_common, Extension::mx_fp8e5m2},
- {{{fp8e4m3T, bs32_fp8ue8m0_fp8e5m2T, fp16T, fp8e4m3T, fp32T, fp32T,
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp8e5m2T, fp8e4m3T, fp16T, fp32T, fp8e4m3T, fp16T,
fp16T},
SpecificationVersion::V_1_1_DRAFT},
{{bs32_fp8ue8m0_fp8e5m2T, fp8e4m3T, fp16T, fp32T, fp8e4m3T, fp32T,
@@ -759,17 +733,14 @@ extensionComplianceMap = {
fp32T},
SpecificationVersion::V_1_1_DRAFT}},
allOf},
- {{Extension::bf16, Extension::fp8e4m3, Extension::mx_common,
- Extension::mx_fp6e3m2},
- {{{fp8e4m3T, bs32_fp8ue8m0_fp6e3m2T, fp16T, fp8e4m3T, fp32T, bf16T,
+ {{Extension::fp8e4m3, Extension::mx_common, Extension::mx_fp6e3m2},
+ {{{fp8e4m3T, bs32_fp8ue8m0_fp6e3m2T, fp16T, fp8e4m3T, fp32T, fp16T,
fp16T},
SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp6e3m2T, fp8e4m3T, fp16T, fp32T, fp8e4m3T, bf16T,
+ {{fp8e4m3T, bs32_fp8ue8m0_fp6e3m2T, fp16T, fp8e4m3T, fp32T, fp32T,
fp16T},
- SpecificationVersion::V_1_1_DRAFT}},
- allOf},
- {{Extension::fp8e4m3, Extension::mx_common, Extension::mx_fp6e3m2},
- {{{fp8e4m3T, bs32_fp8ue8m0_fp6e3m2T, fp16T, fp8e4m3T, fp32T, fp32T,
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp6e3m2T, fp8e4m3T, fp16T, fp32T, fp8e4m3T, fp16T,
fp16T},
SpecificationVersion::V_1_1_DRAFT},
{{bs32_fp8ue8m0_fp6e3m2T, fp8e4m3T, fp16T, fp32T, fp8e4m3T, fp32T,
@@ -782,17 +753,14 @@ extensionComplianceMap = {
fp32T},
SpecificationVersion::V_1_1_DRAFT}},
allOf},
- {{Extension::bf16, Extension::fp8e4m3, Extension::mx_common,
- Extension::mx_fp6e2m3},
- {{{fp8e4m3T, bs32_fp8ue8m0_fp6e2m3T, fp16T, fp8e4m3T, fp32T, bf16T,
+ {{Extension::fp8e4m3, Extension::mx_common, Extension::mx_fp6e2m3},
+ {{{fp8e4m3T, bs32_fp8ue8m0_fp6e2m3T, fp16T, fp8e4m3T, fp32T, fp16T,
fp16T},
SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp6e2m3T, fp8e4m3T, fp16T, fp32T, fp8e4m3T, bf16T,
+ {{fp8e4m3T, bs32_fp8ue8m0_fp6e2m3T, fp16T, fp8e4m3T, fp32T, fp32T,
fp16T},
- SpecificationVersion::V_1_1_DRAFT}},
- allOf},
- {{Extension::fp8e4m3, Extension::mx_common, Extension::mx_fp6e2m3},
- {{{fp8e4m3T, bs32_fp8ue8m0_fp6e2m3T, fp16T, fp8e4m3T, fp32T, fp32T,
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp6e2m3T, fp8e4m3T, fp16T, fp32T, fp8e4m3T, fp16T,
fp16T},
SpecificationVersion::V_1_1_DRAFT},
{{bs32_fp8ue8m0_fp6e2m3T, fp8e4m3T, fp16T, fp32T, fp8e4m3T, fp32T,
@@ -805,17 +773,14 @@ extensionComplianceMap = {
fp32T},
SpecificationVersion::V_1_1_DRAFT}},
allOf},
- {{Extension::bf16, Extension::fp8e4m3, Extension::mx_common,
- Extension::mx_fp4e2m1},
- {{{fp8e4m3T, bs32_fp8ue8m0_fp4e2m1T, fp16T, fp8e4m3T, fp32T, bf16T,
+ {{Extension::fp8e4m3, Extension::mx_common, Extension::mx_fp4e2m1},
+ {{{fp8e4m3T, bs32_fp8ue8m0_fp4e2m1T, fp16T, fp8e4m3T, fp32T, fp16T,
fp16T},
SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp4e2m1T, fp8e4m3T, fp16T, fp32T, fp8e4m3T, bf16T,
+ {{fp8e4m3T, bs32_fp8ue8m0_fp4e2m1T, fp16T, fp8e4m3T, fp32T, fp32T,
fp16T},
- SpecificationVersion::V_1_1_DRAFT}},
- allOf},
- {{Extension::fp8e4m3, Extension::mx_common, Extension::mx_fp4e2m1},
- {{{fp8e4m3T, bs32_fp8ue8m0_fp4e2m1T, fp16T, fp8e4m3T, fp32T, fp32T,
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp4e2m1T, fp8e4m3T, fp16T, fp32T, fp8e4m3T, fp16T,
fp16T},
SpecificationVersion::V_1_1_DRAFT},
{{bs32_fp8ue8m0_fp4e2m1T, fp8e4m3T, fp16T, fp32T, fp8e4m3T, fp32T,
@@ -828,17 +793,14 @@ extensionComplianceMap = {
fp32T},
SpecificationVersion::V_1_1_DRAFT}},
allOf},
- {{Extension::bf16, Extension::fp8e4m3, Extension::mx_common,
- Extension::mx_int8},
- {{{fp8e4m3T, bs32_fp8ue8m0_mxint8T, fp16T, fp8e4m3T, fp32T, bf16T,
+ {{Extension::fp8e4m3, Extension::mx_common, Extension::mx_int8},
+ {{{fp8e4m3T, bs32_fp8ue8m0_mxint8T, fp16T, fp8e4m3T, fp32T, fp16T,
fp16T},
SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_mxint8T, fp8e4m3T, fp16T, fp32T, fp8e4m3T, bf16T,
+ {{fp8e4m3T, bs32_fp8ue8m0_mxint8T, fp16T, fp8e4m3T, fp32T, fp32T,
fp16T},
- SpecificationVersion::V_1_1_DRAFT}},
- allOf},
- {{Extension::fp8e4m3, Extension::mx_common, Extension::mx_int8},
- {{{fp8e4m3T, bs32_fp8ue8m0_mxint8T, fp16T, fp8e4m3T, fp32T, fp32T,
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_mxint8T, fp8e4m3T, fp16T, fp32T, fp8e4m3T, fp16T,
fp16T},
SpecificationVersion::V_1_1_DRAFT},
{{bs32_fp8ue8m0_mxint8T, fp8e4m3T, fp16T, fp32T, fp8e4m3T, fp32T,
@@ -851,37 +813,14 @@ extensionComplianceMap = {
fp32T},
SpecificationVersion::V_1_1_DRAFT}},
allOf},
- {{Extension::bf16, Extension::fp8e5m2},
- {{{fp8e5m2T, fp8e5m2T, fp16T, fp8e5m2T, fp8e5m2T, bf16T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{fp8e5m2T, fp16T, fp16T, fp8e5m2T, fp16T, bf16T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{fp8e5m2T, bf16T, fp16T, fp8e5m2T, bf16T, bf16T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{fp8e5m2T, bf16T, fp16T, fp8e5m2T, bf16T, fp32T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{fp16T, fp8e5m2T, fp16T, fp16T, fp8e5m2T, bf16T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{bf16T, fp8e5m2T, fp16T, bf16T, fp8e5m2T, bf16T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{bf16T, fp8e5m2T, fp16T, bf16T, fp8e5m2T, fp32T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{fp8e5m2T, bf16T, fp32T, fp8e5m2T, bf16T, fp32T, fp32T},
- SpecificationVersion::V_1_1_DRAFT},
- {{bf16T, fp8e5m2T, fp32T, bf16T, fp8e5m2T, fp32T, fp32T},
- SpecificationVersion::V_1_1_DRAFT}},
- allOf},
- {{Extension::bf16, Extension::fp8e5m2, Extension::mx_common,
- Extension::mx_fp8e4m3},
- {{{fp8e5m2T, bs32_fp8ue8m0_fp8e4m3T, fp16T, fp8e5m2T, fp32T, bf16T,
+ {{Extension::fp8e5m2, Extension::mx_common, Extension::mx_fp8e4m3},
+ {{{fp8e5m2T, bs32_fp8ue8m0_fp8e4m3T, fp16T, fp8e5m2T, fp32T, fp16T,
fp16T},
SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp8e4m3T, fp8e5m2T, fp16T, fp32T, fp8e5m2T, bf16T,
+ {{fp8e5m2T, bs32_fp8ue8m0_fp8e4m3T, fp16T, fp8e5m2T, fp32T, fp32T,
fp16T},
- SpecificationVersion::V_1_1_DRAFT}},
- allOf},
- {{Extension::fp8e5m2, Extension::mx_common, Extension::mx_fp8e4m3},
- {{{fp8e5m2T, bs32_fp8ue8m0_fp8e4m3T, fp16T, fp8e5m2T, fp32T, fp32T,
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp8e4m3T, fp8e5m2T, fp16T, fp32T, fp8e5m2T, fp16T,
fp16T},
SpecificationVersion::V_1_1_DRAFT},
{{bs32_fp8ue8m0_fp8e4m3T, fp8e5m2T, fp16T, fp32T, fp8e5m2T, fp32T,
@@ -894,17 +833,14 @@ extensionComplianceMap = {
fp32T},
SpecificationVersion::V_1_1_DRAFT}},
allOf},
- {{Extension::bf16, Extension::fp8e5m2, Extension::mx_common,
- Extension::mx_fp8e5m2},
- {{{fp8e5m2T, bs32_fp8ue8m0_fp8e5m2T, fp16T, fp8e5m2T, fp32T, bf16T,
+ {{Extension::fp8e5m2, Extension::mx_common, Extension::mx_fp8e5m2},
+ {{{fp8e5m2T, bs32_fp8ue8m0_fp8e5m2T, fp16T, fp8e5m2T, fp32T, fp16T,
fp16T},
SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp8e5m2T, fp8e5m2T, fp16T, fp32T, fp8e5m2T, bf16T,
+ {{fp8e5m2T, bs32_fp8ue8m0_fp8e5m2T, fp16T, fp8e5m2T, fp32T, fp32T,
fp16T},
- SpecificationVersion::V_1_1_DRAFT}},
- allOf},
- {{Extension::fp8e5m2, Extension::mx_common, Extension::mx_fp8e5m2},
- {{{fp8e5m2T, bs32_fp8ue8m0_fp8e5m2T, fp16T, fp8e5m2T, fp32T, fp32T,
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp8e5m2T, fp8e5m2T, fp16T, fp32T, fp8e5m2T, fp16T,
fp16T},
SpecificationVersion::V_1_1_DRAFT},
{{bs32_fp8ue8m0_fp8e5m2T, fp8e5m2T, fp16T, fp32T, fp8e5m2T, fp32T,
@@ -917,17 +853,14 @@ extensionComplianceMap = {
fp32T},
SpecificationVersion::V_1_1_DRAFT}},
allOf},
- {{Extension::bf16, Extension::fp8e5m2, Extension::mx_common,
- Extension::mx_fp6e3m2},
- {{{fp8e5m2T, bs32_fp8ue8m0_fp6e3m2T, fp16T, fp8e5m2T, fp32T, bf16T,
+ {{Extension::fp8e5m2, Extension::mx_common, Extension::mx_fp6e3m2},
+ {{{fp8e5m2T, bs32_fp8ue8m0_fp6e3m2T, fp16T, fp8e5m2T, fp32T, fp16T,
fp16T},
SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp6e3m2T, fp8e5m2T, fp16T, fp32T, fp8e5m2T, bf16T,
+ {{fp8e5m2T, bs32_fp8ue8m0_fp6e3m2T, fp16T, fp8e5m2T, fp32T, fp32T,
fp16T},
- SpecificationVersion::V_1_1_DRAFT}},
- allOf},
- {{Extension::fp8e5m2, Extension::mx_common, Extension::mx_fp6e3m2},
- {{{fp8e5m2T, bs32_fp8ue8m0_fp6e3m2T, fp16T, fp8e5m2T, fp32T, fp32T,
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp6e3m2T, fp8e5m2T, fp16T, fp32T, fp8e5m2T, fp16T,
fp16T},
SpecificationVersion::V_1_1_DRAFT},
{{bs32_fp8ue8m0_fp6e3m2T, fp8e5m2T, fp16T, fp32T, fp8e5m2T, fp32T,
@@ -940,17 +873,14 @@ extensionComplianceMap = {
fp32T},
SpecificationVersion::V_1_1_DRAFT}},
allOf},
- {{Extension::bf16, Extension::fp8e5m2, Extension::mx_common,
- Extension::mx_fp6e2m3},
- {{{fp8e5m2T, bs32_fp8ue8m0_fp6e2m3T, fp16T, fp8e5m2T, fp32T, bf16T,
+ {{Extension::fp8e5m2, Extension::mx_common, Extension::mx_fp6e2m3},
+ {{{fp8e5m2T, bs32_fp8ue8m0_fp6e2m3T, fp16T, fp8e5m2T, fp32T, fp16T,
fp16T},
SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp6e2m3T, fp8e5m2T, fp16T, fp32T, fp8e5m2T, bf16T,
+ {{fp8e5m2T, bs32_fp8ue8m0_fp6e2m3T, fp16T, fp8e5m2T, fp32T, fp32T,
fp16T},
- SpecificationVersion::V_1_1_DRAFT}},
- allOf},
- {{Extension::fp8e5m2, Extension::mx_common, Extension::mx_fp6e2m3},
- {{{fp8e5m2T, bs32_fp8ue8m0_fp6e2m3T, fp16T, fp8e5m2T, fp32T, fp32T,
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp6e2m3T, fp8e5m2T, fp16T, fp32T, fp8e5m2T, fp16T,
fp16T},
SpecificationVersion::V_1_1_DRAFT},
{{bs32_fp8ue8m0_fp6e2m3T, fp8e5m2T, fp16T, fp32T, fp8e5m2T, fp32T,
@@ -963,17 +893,14 @@ extensionComplianceMap = {
fp32T},
SpecificationVersion::V_1_1_DRAFT}},
allOf},
- {{Extension::bf16, Extension::fp8e5m2, Extension::mx_common,
- Extension::mx_fp4e2m1},
- {{{fp8e5m2T, bs32_fp8ue8m0_fp4e2m1T, fp16T, fp8e5m2T, fp32T, bf16T,
+ {{Extension::fp8e5m2, Extension::mx_common, Extension::mx_fp4e2m1},
+ {{{fp8e5m2T, bs32_fp8ue8m0_fp4e2m1T, fp16T, fp8e5m2T, fp32T, fp16T,
fp16T},
SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp4e2m1T, fp8e5m2T, fp16T, fp32T, fp8e5m2T, bf16T,
+ {{fp8e5m2T, bs32_fp8ue8m0_fp4e2m1T, fp16T, fp8e5m2T, fp32T, fp32T,
fp16T},
- SpecificationVersion::V_1_1_DRAFT}},
- allOf},
- {{Extension::fp8e5m2, Extension::mx_common, Extension::mx_fp4e2m1},
- {{{fp8e5m2T, bs32_fp8ue8m0_fp4e2m1T, fp16T, fp8e5m2T, fp32T, fp32T,
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp4e2m1T, fp8e5m2T, fp16T, fp32T, fp8e5m2T, fp16T,
fp16T},
SpecificationVersion::V_1_1_DRAFT},
{{bs32_fp8ue8m0_fp4e2m1T, fp8e5m2T, fp16T, fp32T, fp8e5m2T, fp32T,
@@ -986,17 +913,14 @@ extensionComplianceMap = {
fp32T},
SpecificationVersion::V_1_1_DRAFT}},
allOf},
- {{Extension::bf16, Extension::fp8e5m2, Extension::mx_common,
- Extension::mx_int8},
- {{{fp8e5m2T, bs32_fp8ue8m0_mxint8T, fp16T, fp8e5m2T, fp32T, bf16T,
+ {{Extension::fp8e5m2, Extension::mx_common, Extension::mx_int8},
+ {{{fp8e5m2T, bs32_fp8ue8m0_mxint8T, fp16T, fp8e5m2T, fp32T, fp16T,
fp16T},
SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_mxint8T, fp8e5m2T, fp16T, fp32T, fp8e5m2T, bf16T,
+ {{fp8e5m2T, bs32_fp8ue8m0_mxint8T, fp16T, fp8e5m2T, fp32T, fp32T,
fp16T},
- SpecificationVersion::V_1_1_DRAFT}},
- allOf},
- {{Extension::fp8e5m2, Extension::mx_common, Extension::mx_int8},
- {{{fp8e5m2T, bs32_fp8ue8m0_mxint8T, fp16T, fp8e5m2T, fp32T, fp32T,
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_mxint8T, fp8e5m2T, fp16T, fp32T, fp8e5m2T, fp16T,
fp16T},
SpecificationVersion::V_1_1_DRAFT},
{{bs32_fp8ue8m0_mxint8T, fp8e5m2T, fp16T, fp32T, fp8e5m2T, fp32T,
@@ -1009,31 +933,17 @@ extensionComplianceMap = {
fp32T},
SpecificationVersion::V_1_1_DRAFT}},
allOf},
- {{Extension::bf16, Extension::mx_common, Extension::mx_fp8e4m3},
- {{{fp16T, bs32_fp8ue8m0_fp8e4m3T, fp16T, fp16T, fp32T, bf16T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{bf16T, bs32_fp8ue8m0_fp8e4m3T, fp16T, bf16T, fp32T, bf16T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{bf16T, bs32_fp8ue8m0_fp8e4m3T, fp16T, bf16T, fp32T, fp32T, fp16T},
+ {{Extension::mx_common, Extension::mx_fp8e4m3},
+ {{{fp16T, bs32_fp8ue8m0_fp8e4m3T, fp16T, fp16T, fp32T, fp16T, fp16T},
SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp8e4m3T, fp16T, fp16T, fp32T, fp16T, bf16T, fp16T},
+ {{fp16T, bs32_fp8ue8m0_fp8e4m3T, fp16T, fp16T, fp32T, fp32T, fp16T},
SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp8e4m3T, bf16T, fp16T, fp32T, bf16T, bf16T, fp16T},
+ {{bs32_fp8ue8m0_fp8e4m3T, fp16T, fp16T, fp32T, fp16T, fp16T, fp16T},
SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp8e4m3T, bf16T, fp16T, fp32T, bf16T, fp32T, fp16T},
+ {{bs32_fp8ue8m0_fp8e4m3T, fp16T, fp16T, fp32T, fp16T, fp32T, fp16T},
SpecificationVersion::V_1_1_DRAFT},
{{bs32_fp8ue8m0_fp8e4m3T, bs32_fp8ue8m0_fp8e4m3T, fp16T, fp32T, fp32T,
- bf16T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{bf16T, bs32_fp8ue8m0_fp8e4m3T, fp32T, bf16T, fp32T, fp32T, fp32T},
- SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp8e4m3T, bf16T, fp32T, fp32T, bf16T, fp32T, fp32T},
- SpecificationVersion::V_1_1_DRAFT}},
- allOf},
- {{Extension::mx_common, Extension::mx_fp8e4m3},
- {{{fp16T, bs32_fp8ue8m0_fp8e4m3T, fp16T, fp16T, fp32T, fp32T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp8e4m3T, fp16T, fp16T, fp32T, fp16T, fp32T, fp16T},
+ fp16T, fp16T},
SpecificationVersion::V_1_1_DRAFT},
{{bs32_fp8ue8m0_fp8e4m3T, bs32_fp8ue8m0_fp8e4m3T, fp16T, fp32T, fp32T,
fp32T, fp16T},
@@ -1050,31 +960,17 @@ extensionComplianceMap = {
fp32T, fp32T},
SpecificationVersion::V_1_1_DRAFT}},
allOf},
- {{Extension::bf16, Extension::mx_common, Extension::mx_fp8e5m2},
- {{{fp16T, bs32_fp8ue8m0_fp8e5m2T, fp16T, fp16T, fp32T, bf16T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{bf16T, bs32_fp8ue8m0_fp8e5m2T, fp16T, bf16T, fp32T, bf16T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{bf16T, bs32_fp8ue8m0_fp8e5m2T, fp16T, bf16T, fp32T, fp32T, fp16T},
+ {{Extension::mx_common, Extension::mx_fp8e5m2},
+ {{{fp16T, bs32_fp8ue8m0_fp8e5m2T, fp16T, fp16T, fp32T, fp16T, fp16T},
SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp8e5m2T, fp16T, fp16T, fp32T, fp16T, bf16T, fp16T},
+ {{fp16T, bs32_fp8ue8m0_fp8e5m2T, fp16T, fp16T, fp32T, fp32T, fp16T},
SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp8e5m2T, bf16T, fp16T, fp32T, bf16T, bf16T, fp16T},
+ {{bs32_fp8ue8m0_fp8e5m2T, fp16T, fp16T, fp32T, fp16T, fp16T, fp16T},
SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp8e5m2T, bf16T, fp16T, fp32T, bf16T, fp32T, fp16T},
+ {{bs32_fp8ue8m0_fp8e5m2T, fp16T, fp16T, fp32T, fp16T, fp32T, fp16T},
SpecificationVersion::V_1_1_DRAFT},
{{bs32_fp8ue8m0_fp8e5m2T, bs32_fp8ue8m0_fp8e5m2T, fp16T, fp32T, fp32T,
- bf16T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{bf16T, bs32_fp8ue8m0_fp8e5m2T, fp32T, bf16T, fp32T, fp32T, fp32T},
- SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp8e5m2T, bf16T, fp32T, fp32T, bf16T, fp32T, fp32T},
- SpecificationVersion::V_1_1_DRAFT}},
- allOf},
- {{Extension::mx_common, Extension::mx_fp8e5m2},
- {{{fp16T, bs32_fp8ue8m0_fp8e5m2T, fp16T, fp16T, fp32T, fp32T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp8e5m2T, fp16T, fp16T, fp32T, fp16T, fp32T, fp16T},
+ fp16T, fp16T},
SpecificationVersion::V_1_1_DRAFT},
{{bs32_fp8ue8m0_fp8e5m2T, bs32_fp8ue8m0_fp8e5m2T, fp16T, fp32T, fp32T,
fp32T, fp16T},
@@ -1091,31 +987,17 @@ extensionComplianceMap = {
fp32T, fp32T},
SpecificationVersion::V_1_1_DRAFT}},
allOf},
- {{Extension::bf16, Extension::mx_common, Extension::mx_fp6e3m2},
- {{{fp16T, bs32_fp8ue8m0_fp6e3m2T, fp16T, fp16T, fp32T, bf16T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{bf16T, bs32_fp8ue8m0_fp6e3m2T, fp16T, bf16T, fp32T, bf16T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{bf16T, bs32_fp8ue8m0_fp6e3m2T, fp16T, bf16T, fp32T, fp32T, fp16T},
+ {{Extension::mx_common, Extension::mx_fp6e3m2},
+ {{{fp16T, bs32_fp8ue8m0_fp6e3m2T, fp16T, fp16T, fp32T, fp16T, fp16T},
SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp6e3m2T, fp16T, fp16T, fp32T, fp16T, bf16T, fp16T},
+ {{fp16T, bs32_fp8ue8m0_fp6e3m2T, fp16T, fp16T, fp32T, fp32T, fp16T},
SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp6e3m2T, bf16T, fp16T, fp32T, bf16T, bf16T, fp16T},
+ {{bs32_fp8ue8m0_fp6e3m2T, fp16T, fp16T, fp32T, fp16T, fp16T, fp16T},
SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp6e3m2T, bf16T, fp16T, fp32T, bf16T, fp32T, fp16T},
+ {{bs32_fp8ue8m0_fp6e3m2T, fp16T, fp16T, fp32T, fp16T, fp32T, fp16T},
SpecificationVersion::V_1_1_DRAFT},
{{bs32_fp8ue8m0_fp6e3m2T, bs32_fp8ue8m0_fp6e3m2T, fp16T, fp32T, fp32T,
- bf16T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{bf16T, bs32_fp8ue8m0_fp6e3m2T, fp32T, bf16T, fp32T, fp32T, fp32T},
- SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp6e3m2T, bf16T, fp32T, fp32T, bf16T, fp32T, fp32T},
- SpecificationVersion::V_1_1_DRAFT}},
- allOf},
- {{Extension::mx_common, Extension::mx_fp6e3m2},
- {{{fp16T, bs32_fp8ue8m0_fp6e3m2T, fp16T, fp16T, fp32T, fp32T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp6e3m2T, fp16T, fp16T, fp32T, fp16T, fp32T, fp16T},
+ fp16T, fp16T},
SpecificationVersion::V_1_1_DRAFT},
{{bs32_fp8ue8m0_fp6e3m2T, bs32_fp8ue8m0_fp6e3m2T, fp16T, fp32T, fp32T,
fp32T, fp16T},
@@ -1132,31 +1014,17 @@ extensionComplianceMap = {
fp32T, fp32T},
SpecificationVersion::V_1_1_DRAFT}},
allOf},
- {{Extension::bf16, Extension::mx_common, Extension::mx_fp6e2m3},
- {{{fp16T, bs32_fp8ue8m0_fp6e2m3T, fp16T, fp16T, fp32T, bf16T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{bf16T, bs32_fp8ue8m0_fp6e2m3T, fp16T, bf16T, fp32T, bf16T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{bf16T, bs32_fp8ue8m0_fp6e2m3T, fp16T, bf16T, fp32T, fp32T, fp16T},
+ {{Extension::mx_common, Extension::mx_fp6e2m3},
+ {{{fp16T, bs32_fp8ue8m0_fp6e2m3T, fp16T, fp16T, fp32T, fp16T, fp16T},
SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp6e2m3T, fp16T, fp16T, fp32T, fp16T, bf16T, fp16T},
+ {{fp16T, bs32_fp8ue8m0_fp6e2m3T, fp16T, fp16T, fp32T, fp32T, fp16T},
SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp6e2m3T, bf16T, fp16T, fp32T, bf16T, bf16T, fp16T},
+ {{bs32_fp8ue8m0_fp6e2m3T, fp16T, fp16T, fp32T, fp16T, fp16T, fp16T},
SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp6e2m3T, bf16T, fp16T, fp32T, bf16T, fp32T, fp16T},
+ {{bs32_fp8ue8m0_fp6e2m3T, fp16T, fp16T, fp32T, fp16T, fp32T, fp16T},
SpecificationVersion::V_1_1_DRAFT},
{{bs32_fp8ue8m0_fp6e2m3T, bs32_fp8ue8m0_fp6e2m3T, fp16T, fp32T, fp32T,
- bf16T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{bf16T, bs32_fp8ue8m0_fp6e2m3T, fp32T, bf16T, fp32T, fp32T, fp32T},
- SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp6e2m3T, bf16T, fp32T, fp32T, bf16T, fp32T, fp32T},
- SpecificationVersion::V_1_1_DRAFT}},
- allOf},
- {{Extension::mx_common, Extension::mx_fp6e2m3},
- {{{fp16T, bs32_fp8ue8m0_fp6e2m3T, fp16T, fp16T, fp32T, fp32T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp6e2m3T, fp16T, fp16T, fp32T, fp16T, fp32T, fp16T},
+ fp16T, fp16T},
SpecificationVersion::V_1_1_DRAFT},
{{bs32_fp8ue8m0_fp6e2m3T, bs32_fp8ue8m0_fp6e2m3T, fp16T, fp32T, fp32T,
fp32T, fp16T},
@@ -1173,31 +1041,17 @@ extensionComplianceMap = {
fp32T, fp32T},
SpecificationVersion::V_1_1_DRAFT}},
allOf},
- {{Extension::bf16, Extension::mx_common, Extension::mx_fp4e2m1},
- {{{fp16T, bs32_fp8ue8m0_fp4e2m1T, fp16T, fp16T, fp32T, bf16T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{bf16T, bs32_fp8ue8m0_fp4e2m1T, fp16T, bf16T, fp32T, bf16T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{bf16T, bs32_fp8ue8m0_fp4e2m1T, fp16T, bf16T, fp32T, fp32T, fp16T},
+ {{Extension::mx_common, Extension::mx_fp4e2m1},
+ {{{fp16T, bs32_fp8ue8m0_fp4e2m1T, fp16T, fp16T, fp32T, fp16T, fp16T},
SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp4e2m1T, fp16T, fp16T, fp32T, fp16T, bf16T, fp16T},
+ {{fp16T, bs32_fp8ue8m0_fp4e2m1T, fp16T, fp16T, fp32T, fp32T, fp16T},
SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp4e2m1T, bf16T, fp16T, fp32T, bf16T, bf16T, fp16T},
+ {{bs32_fp8ue8m0_fp4e2m1T, fp16T, fp16T, fp32T, fp16T, fp16T, fp16T},
SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp4e2m1T, bf16T, fp16T, fp32T, bf16T, fp32T, fp16T},
+ {{bs32_fp8ue8m0_fp4e2m1T, fp16T, fp16T, fp32T, fp16T, fp32T, fp16T},
SpecificationVersion::V_1_1_DRAFT},
{{bs32_fp8ue8m0_fp4e2m1T, bs32_fp8ue8m0_fp4e2m1T, fp16T, fp32T, fp32T,
- bf16T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{bf16T, bs32_fp8ue8m0_fp4e2m1T, fp32T, bf16T, fp32T, fp32T, fp32T},
- SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp4e2m1T, bf16T, fp32T, fp32T, bf16T, fp32T, fp32T},
- SpecificationVersion::V_1_1_DRAFT}},
- allOf},
- {{Extension::mx_common, Extension::mx_fp4e2m1},
- {{{fp16T, bs32_fp8ue8m0_fp4e2m1T, fp16T, fp16T, fp32T, fp32T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp4e2m1T, fp16T, fp16T, fp32T, fp16T, fp32T, fp16T},
+ fp16T, fp16T},
SpecificationVersion::V_1_1_DRAFT},
{{bs32_fp8ue8m0_fp4e2m1T, bs32_fp8ue8m0_fp4e2m1T, fp16T, fp32T, fp32T,
fp32T, fp16T},
@@ -1214,31 +1068,17 @@ extensionComplianceMap = {
fp32T, fp32T},
SpecificationVersion::V_1_1_DRAFT}},
allOf},
- {{Extension::bf16, Extension::mx_common, Extension::mx_int8},
- {{{fp16T, bs32_fp8ue8m0_mxint8T, fp16T, fp16T, fp32T, bf16T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{bf16T, bs32_fp8ue8m0_mxint8T, fp16T, bf16T, fp32T, bf16T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{bf16T, bs32_fp8ue8m0_mxint8T, fp16T, bf16T, fp32T, fp32T, fp16T},
+ {{Extension::mx_common, Extension::mx_int8},
+ {{{fp16T, bs32_fp8ue8m0_mxint8T, fp16T, fp16T, fp32T, fp16T, fp16T},
SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_mxint8T, fp16T, fp16T, fp32T, fp16T, bf16T, fp16T},
+ {{fp16T, bs32_fp8ue8m0_mxint8T, fp16T, fp16T, fp32T, fp32T, fp16T},
SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_mxint8T, bf16T, fp16T, fp32T, bf16T, bf16T, fp16T},
+ {{bs32_fp8ue8m0_mxint8T, fp16T, fp16T, fp32T, fp16T, fp16T, fp16T},
SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_mxint8T, bf16T, fp16T, fp32T, bf16T, fp32T, fp16T},
+ {{bs32_fp8ue8m0_mxint8T, fp16T, fp16T, fp32T, fp16T, fp32T, fp16T},
SpecificationVersion::V_1_1_DRAFT},
{{bs32_fp8ue8m0_mxint8T, bs32_fp8ue8m0_mxint8T, fp16T, fp32T, fp32T,
- bf16T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{bf16T, bs32_fp8ue8m0_mxint8T, fp32T, bf16T, fp32T, fp32T, fp32T},
- SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_mxint8T, bf16T, fp32T, fp32T, bf16T, fp32T, fp32T},
- SpecificationVersion::V_1_1_DRAFT}},
- allOf},
- {{Extension::mx_common, Extension::mx_int8},
- {{{fp16T, bs32_fp8ue8m0_mxint8T, fp16T, fp16T, fp32T, fp32T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_mxint8T, fp16T, fp16T, fp32T, fp16T, fp32T, fp16T},
+ fp16T, fp16T},
SpecificationVersion::V_1_1_DRAFT},
{{bs32_fp8ue8m0_mxint8T, bs32_fp8ue8m0_mxint8T, fp16T, fp32T, fp32T,
fp32T, fp16T},
@@ -1255,19 +1095,16 @@ extensionComplianceMap = {
fp32T, fp32T},
SpecificationVersion::V_1_1_DRAFT}},
allOf},
- {{Extension::bf16, Extension::mx_common, Extension::mx_fp8e4m3,
- Extension::mx_fp8e5m2},
- {{{bs32_fp8ue8m0_fp8e4m3T, bs32_fp8ue8m0_fp8e5m2T, fp16T, fp32T, fp32T,
- bf16T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp8e5m2T, bs32_fp8ue8m0_fp8e4m3T, fp16T, fp32T, fp32T,
- bf16T, fp16T},
- SpecificationVersion::V_1_1_DRAFT}},
- allOf},
{{Extension::mx_common, Extension::mx_fp8e4m3, Extension::mx_fp8e5m2},
{{{bs32_fp8ue8m0_fp8e4m3T, bs32_fp8ue8m0_fp8e5m2T, fp16T, fp32T, fp32T,
+ fp16T, fp16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp8e4m3T, bs32_fp8ue8m0_fp8e5m2T, fp16T, fp32T, fp32T,
fp32T, fp16T},
SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp8e5m2T, bs32_fp8ue8m0_fp8e4m3T, fp16T, fp32T, fp32T,
+ fp16T, fp16T},
+ SpecificationVersion::V_1_1_DRAFT},
{{bs32_fp8ue8m0_fp8e5m2T, bs32_fp8ue8m0_fp8e4m3T, fp16T, fp32T, fp32T,
fp32T, fp16T},
SpecificationVersion::V_1_1_DRAFT},
@@ -1278,19 +1115,16 @@ extensionComplianceMap = {
fp32T, fp32T},
SpecificationVersion::V_1_1_DRAFT}},
allOf},
- {{Extension::bf16, Extension::mx_common, Extension::mx_fp6e3m2,
- Extension::mx_fp8e4m3},
- {{{bs32_fp8ue8m0_fp8e4m3T, bs32_fp8ue8m0_fp6e3m2T, fp16T, fp32T, fp32T,
- bf16T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp6e3m2T, bs32_fp8ue8m0_fp8e4m3T, fp16T, fp32T, fp32T,
- bf16T, fp16T},
- SpecificationVersion::V_1_1_DRAFT}},
- allOf},
{{Extension::mx_common, Extension::mx_fp6e3m2, Extension::mx_fp8e4m3},
{{{bs32_fp8ue8m0_fp8e4m3T, bs32_fp8ue8m0_fp6e3m2T, fp16T, fp32T, fp32T,
+ fp16T, fp16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp8e4m3T, bs32_fp8ue8m0_fp6e3m2T, fp16T, fp32T, fp32T,
fp32T, fp16T},
SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp6e3m2T, bs32_fp8ue8m0_fp8e4m3T, fp16T, fp32T, fp32T,
+ fp16T, fp16T},
+ SpecificationVersion::V_1_1_DRAFT},
{{bs32_fp8ue8m0_fp6e3m2T, bs32_fp8ue8m0_fp8e4m3T, fp16T, fp32T, fp32T,
fp32T, fp16T},
SpecificationVersion::V_1_1_DRAFT},
@@ -1301,19 +1135,16 @@ extensionComplianceMap = {
fp32T, fp32T},
SpecificationVersion::V_1_1_DRAFT}},
allOf},
- {{Extension::bf16, Extension::mx_common, Extension::mx_fp6e2m3,
- Extension::mx_fp8e4m3},
- {{{bs32_fp8ue8m0_fp8e4m3T, bs32_fp8ue8m0_fp6e2m3T, fp16T, fp32T, fp32T,
- bf16T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp6e2m3T, bs32_fp8ue8m0_fp8e4m3T, fp16T, fp32T, fp32T,
- bf16T, fp16T},
- SpecificationVersion::V_1_1_DRAFT}},
- allOf},
{{Extension::mx_common, Extension::mx_fp6e2m3, Extension::mx_fp8e4m3},
{{{bs32_fp8ue8m0_fp8e4m3T, bs32_fp8ue8m0_fp6e2m3T, fp16T, fp32T, fp32T,
+ fp16T, fp16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp8e4m3T, bs32_fp8ue8m0_fp6e2m3T, fp16T, fp32T, fp32T,
fp32T, fp16T},
SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp6e2m3T, bs32_fp8ue8m0_fp8e4m3T, fp16T, fp32T, fp32T,
+ fp16T, fp16T},
+ SpecificationVersion::V_1_1_DRAFT},
{{bs32_fp8ue8m0_fp6e2m3T, bs32_fp8ue8m0_fp8e4m3T, fp16T, fp32T, fp32T,
fp32T, fp16T},
SpecificationVersion::V_1_1_DRAFT},
@@ -1324,19 +1155,16 @@ extensionComplianceMap = {
fp32T, fp32T},
SpecificationVersion::V_1_1_DRAFT}},
allOf},
- {{Extension::bf16, Extension::mx_common, Extension::mx_fp4e2m1,
- Extension::mx_fp8e4m3},
- {{{bs32_fp8ue8m0_fp8e4m3T, bs32_fp8ue8m0_fp4e2m1T, fp16T, fp32T, fp32T,
- bf16T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp4e2m1T, bs32_fp8ue8m0_fp8e4m3T, fp16T, fp32T, fp32T,
- bf16T, fp16T},
- SpecificationVersion::V_1_1_DRAFT}},
- allOf},
{{Extension::mx_common, Extension::mx_fp4e2m1, Extension::mx_fp8e4m3},
{{{bs32_fp8ue8m0_fp8e4m3T, bs32_fp8ue8m0_fp4e2m1T, fp16T, fp32T, fp32T,
+ fp16T, fp16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp8e4m3T, bs32_fp8ue8m0_fp4e2m1T, fp16T, fp32T, fp32T,
fp32T, fp16T},
SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp4e2m1T, bs32_fp8ue8m0_fp8e4m3T, fp16T, fp32T, fp32T,
+ fp16T, fp16T},
+ SpecificationVersion::V_1_1_DRAFT},
{{bs32_fp8ue8m0_fp4e2m1T, bs32_fp8ue8m0_fp8e4m3T, fp16T, fp32T, fp32T,
fp32T, fp16T},
SpecificationVersion::V_1_1_DRAFT},
@@ -1347,18 +1175,15 @@ extensionComplianceMap = {
fp32T, fp32T},
SpecificationVersion::V_1_1_DRAFT}},
allOf},
- {{Extension::bf16, Extension::mx_common, Extension::mx_fp8e4m3,
- Extension::mx_int8},
+ {{Extension::mx_common, Extension::mx_fp8e4m3, Extension::mx_int8},
{{{bs32_fp8ue8m0_fp8e4m3T, bs32_fp8ue8m0_mxint8T, fp16T, fp32T, fp32T,
- bf16T, fp16T},
+ fp16T, fp16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp8e4m3T, bs32_fp8ue8m0_mxint8T, fp16T, fp32T, fp32T,
+ fp32T, fp16T},
SpecificationVersion::V_1_1_DRAFT},
{{bs32_fp8ue8m0_mxint8T, bs32_fp8ue8m0_fp8e4m3T, fp16T, fp32T, fp32T,
- bf16T, fp16T},
- SpecificationVersion::V_1_1_DRAFT}},
- allOf},
- {{Extension::mx_common, Extension::mx_fp8e4m3, Extension::mx_int8},
- {{{bs32_fp8ue8m0_fp8e4m3T, bs32_fp8ue8m0_mxint8T, fp16T, fp32T, fp32T,
- fp32T, fp16T},
+ fp16T, fp16T},
SpecificationVersion::V_1_1_DRAFT},
{{bs32_fp8ue8m0_mxint8T, bs32_fp8ue8m0_fp8e4m3T, fp16T, fp32T, fp32T,
fp32T, fp16T},
@@ -1370,19 +1195,16 @@ extensionComplianceMap = {
fp32T, fp32T},
SpecificationVersion::V_1_1_DRAFT}},
allOf},
- {{Extension::bf16, Extension::mx_common, Extension::mx_fp6e3m2,
- Extension::mx_fp8e5m2},
- {{{bs32_fp8ue8m0_fp8e5m2T, bs32_fp8ue8m0_fp6e3m2T, fp16T, fp32T, fp32T,
- bf16T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp6e3m2T, bs32_fp8ue8m0_fp8e5m2T, fp16T, fp32T, fp32T,
- bf16T, fp16T},
- SpecificationVersion::V_1_1_DRAFT}},
- allOf},
{{Extension::mx_common, Extension::mx_fp6e3m2, Extension::mx_fp8e5m2},
{{{bs32_fp8ue8m0_fp8e5m2T, bs32_fp8ue8m0_fp6e3m2T, fp16T, fp32T, fp32T,
+ fp16T, fp16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp8e5m2T, bs32_fp8ue8m0_fp6e3m2T, fp16T, fp32T, fp32T,
fp32T, fp16T},
SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp6e3m2T, bs32_fp8ue8m0_fp8e5m2T, fp16T, fp32T, fp32T,
+ fp16T, fp16T},
+ SpecificationVersion::V_1_1_DRAFT},
{{bs32_fp8ue8m0_fp6e3m2T, bs32_fp8ue8m0_fp8e5m2T, fp16T, fp32T, fp32T,
fp32T, fp16T},
SpecificationVersion::V_1_1_DRAFT},
@@ -1393,19 +1215,16 @@ extensionComplianceMap = {
fp32T, fp32T},
SpecificationVersion::V_1_1_DRAFT}},
allOf},
- {{Extension::bf16, Extension::mx_common, Extension::mx_fp6e2m3,
- Extension::mx_fp8e5m2},
- {{{bs32_fp8ue8m0_fp8e5m2T, bs32_fp8ue8m0_fp6e2m3T, fp16T, fp32T, fp32T,
- bf16T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp6e2m3T, bs32_fp8ue8m0_fp8e5m2T, fp16T, fp32T, fp32T,
- bf16T, fp16T},
- SpecificationVersion::V_1_1_DRAFT}},
- allOf},
{{Extension::mx_common, Extension::mx_fp6e2m3, Extension::mx_fp8e5m2},
{{{bs32_fp8ue8m0_fp8e5m2T, bs32_fp8ue8m0_fp6e2m3T, fp16T, fp32T, fp32T,
+ fp16T, fp16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp8e5m2T, bs32_fp8ue8m0_fp6e2m3T, fp16T, fp32T, fp32T,
fp32T, fp16T},
SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp6e2m3T, bs32_fp8ue8m0_fp8e5m2T, fp16T, fp32T, fp32T,
+ fp16T, fp16T},
+ SpecificationVersion::V_1_1_DRAFT},
{{bs32_fp8ue8m0_fp6e2m3T, bs32_fp8ue8m0_fp8e5m2T, fp16T, fp32T, fp32T,
fp32T, fp16T},
SpecificationVersion::V_1_1_DRAFT},
@@ -1416,19 +1235,16 @@ extensionComplianceMap = {
fp32T, fp32T},
SpecificationVersion::V_1_1_DRAFT}},
allOf},
- {{Extension::bf16, Extension::mx_common, Extension::mx_fp4e2m1,
- Extension::mx_fp8e5m2},
- {{{bs32_fp8ue8m0_fp8e5m2T, bs32_fp8ue8m0_fp4e2m1T, fp16T, fp32T, fp32T,
- bf16T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp4e2m1T, bs32_fp8ue8m0_fp8e5m2T, fp16T, fp32T, fp32T,
- bf16T, fp16T},
- SpecificationVersion::V_1_1_DRAFT}},
- allOf},
{{Extension::mx_common, Extension::mx_fp4e2m1, Extension::mx_fp8e5m2},
{{{bs32_fp8ue8m0_fp8e5m2T, bs32_fp8ue8m0_fp4e2m1T, fp16T, fp32T, fp32T,
+ fp16T, fp16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp8e5m2T, bs32_fp8ue8m0_fp4e2m1T, fp16T, fp32T, fp32T,
fp32T, fp16T},
SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp4e2m1T, bs32_fp8ue8m0_fp8e5m2T, fp16T, fp32T, fp32T,
+ fp16T, fp16T},
+ SpecificationVersion::V_1_1_DRAFT},
{{bs32_fp8ue8m0_fp4e2m1T, bs32_fp8ue8m0_fp8e5m2T, fp16T, fp32T, fp32T,
fp32T, fp16T},
SpecificationVersion::V_1_1_DRAFT},
@@ -1439,19 +1255,16 @@ extensionComplianceMap = {
fp32T, fp32T},
SpecificationVersion::V_1_1_DRAFT}},
allOf},
- {{Extension::bf16, Extension::mx_common, Extension::mx_fp8e5m2,
- Extension::mx_int8},
- {{{bs32_fp8ue8m0_fp8e5m2T, bs32_fp8ue8m0_mxint8T, fp16T, fp32T, fp32T,
- bf16T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_mxint8T, bs32_fp8ue8m0_fp8e5m2T, fp16T, fp32T, fp32T,
- bf16T, fp16T},
- SpecificationVersion::V_1_1_DRAFT}},
- allOf},
{{Extension::mx_common, Extension::mx_fp8e5m2, Extension::mx_int8},
{{{bs32_fp8ue8m0_fp8e5m2T, bs32_fp8ue8m0_mxint8T, fp16T, fp32T, fp32T,
+ fp16T, fp16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp8e5m2T, bs32_fp8ue8m0_mxint8T, fp16T, fp32T, fp32T,
fp32T, fp16T},
SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_mxint8T, bs32_fp8ue8m0_fp8e5m2T, fp16T, fp32T, fp32T,
+ fp16T, fp16T},
+ SpecificationVersion::V_1_1_DRAFT},
{{bs32_fp8ue8m0_mxint8T, bs32_fp8ue8m0_fp8e5m2T, fp16T, fp32T, fp32T,
fp32T, fp16T},
SpecificationVersion::V_1_1_DRAFT},
@@ -1462,19 +1275,16 @@ extensionComplianceMap = {
fp32T, fp32T},
SpecificationVersion::V_1_1_DRAFT}},
allOf},
- {{Extension::bf16, Extension::mx_common, Extension::mx_fp6e2m3,
- Extension::mx_fp6e3m2},
- {{{bs32_fp8ue8m0_fp6e3m2T, bs32_fp8ue8m0_fp6e2m3T, fp16T, fp32T, fp32T,
- bf16T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp6e2m3T, bs32_fp8ue8m0_fp6e3m2T, fp16T, fp32T, fp32T,
- bf16T, fp16T},
- SpecificationVersion::V_1_1_DRAFT}},
- allOf},
{{Extension::mx_common, Extension::mx_fp6e2m3, Extension::mx_fp6e3m2},
{{{bs32_fp8ue8m0_fp6e3m2T, bs32_fp8ue8m0_fp6e2m3T, fp16T, fp32T, fp32T,
+ fp16T, fp16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp6e3m2T, bs32_fp8ue8m0_fp6e2m3T, fp16T, fp32T, fp32T,
fp32T, fp16T},
SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp6e2m3T, bs32_fp8ue8m0_fp6e3m2T, fp16T, fp32T, fp32T,
+ fp16T, fp16T},
+ SpecificationVersion::V_1_1_DRAFT},
{{bs32_fp8ue8m0_fp6e2m3T, bs32_fp8ue8m0_fp6e3m2T, fp16T, fp32T, fp32T,
fp32T, fp16T},
SpecificationVersion::V_1_1_DRAFT},
@@ -1485,19 +1295,16 @@ extensionComplianceMap = {
fp32T, fp32T},
SpecificationVersion::V_1_1_DRAFT}},
allOf},
- {{Extension::bf16, Extension::mx_common, Extension::mx_fp4e2m1,
- Extension::mx_fp6e3m2},
- {{{bs32_fp8ue8m0_fp6e3m2T, bs32_fp8ue8m0_fp4e2m1T, fp16T, fp32T, fp32T,
- bf16T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp4e2m1T, bs32_fp8ue8m0_fp6e3m2T, fp16T, fp32T, fp32T,
- bf16T, fp16T},
- SpecificationVersion::V_1_1_DRAFT}},
- allOf},
{{Extension::mx_common, Extension::mx_fp4e2m1, Extension::mx_fp6e3m2},
{{{bs32_fp8ue8m0_fp6e3m2T, bs32_fp8ue8m0_fp4e2m1T, fp16T, fp32T, fp32T,
+ fp16T, fp16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp6e3m2T, bs32_fp8ue8m0_fp4e2m1T, fp16T, fp32T, fp32T,
fp32T, fp16T},
SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp4e2m1T, bs32_fp8ue8m0_fp6e3m2T, fp16T, fp32T, fp32T,
+ fp16T, fp16T},
+ SpecificationVersion::V_1_1_DRAFT},
{{bs32_fp8ue8m0_fp4e2m1T, bs32_fp8ue8m0_fp6e3m2T, fp16T, fp32T, fp32T,
fp32T, fp16T},
SpecificationVersion::V_1_1_DRAFT},
@@ -1508,19 +1315,16 @@ extensionComplianceMap = {
fp32T, fp32T},
SpecificationVersion::V_1_1_DRAFT}},
allOf},
- {{Extension::bf16, Extension::mx_common, Extension::mx_fp6e3m2,
- Extension::mx_int8},
- {{{bs32_fp8ue8m0_fp6e3m2T, bs32_fp8ue8m0_mxint8T, fp16T, fp32T, fp32T,
- bf16T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_mxint8T, bs32_fp8ue8m0_fp6e3m2T, fp16T, fp32T, fp32T,
- bf16T, fp16T},
- SpecificationVersion::V_1_1_DRAFT}},
- allOf},
{{Extension::mx_common, Extension::mx_fp6e3m2, Extension::mx_int8},
{{{bs32_fp8ue8m0_fp6e3m2T, bs32_fp8ue8m0_mxint8T, fp16T, fp32T, fp32T,
+ fp16T, fp16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp6e3m2T, bs32_fp8ue8m0_mxint8T, fp16T, fp32T, fp32T,
fp32T, fp16T},
SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_mxint8T, bs32_fp8ue8m0_fp6e3m2T, fp16T, fp32T, fp32T,
+ fp16T, fp16T},
+ SpecificationVersion::V_1_1_DRAFT},
{{bs32_fp8ue8m0_mxint8T, bs32_fp8ue8m0_fp6e3m2T, fp16T, fp32T, fp32T,
fp32T, fp16T},
SpecificationVersion::V_1_1_DRAFT},
@@ -1531,19 +1335,16 @@ extensionComplianceMap = {
fp32T, fp32T},
SpecificationVersion::V_1_1_DRAFT}},
allOf},
- {{Extension::bf16, Extension::mx_common, Extension::mx_fp4e2m1,
- Extension::mx_fp6e2m3},
- {{{bs32_fp8ue8m0_fp6e2m3T, bs32_fp8ue8m0_fp4e2m1T, fp16T, fp32T, fp32T,
- bf16T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_fp4e2m1T, bs32_fp8ue8m0_fp6e2m3T, fp16T, fp32T, fp32T,
- bf16T, fp16T},
- SpecificationVersion::V_1_1_DRAFT}},
- allOf},
{{Extension::mx_common, Extension::mx_fp4e2m1, Extension::mx_fp6e2m3},
{{{bs32_fp8ue8m0_fp6e2m3T, bs32_fp8ue8m0_fp4e2m1T, fp16T, fp32T, fp32T,
+ fp16T, fp16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp6e2m3T, bs32_fp8ue8m0_fp4e2m1T, fp16T, fp32T, fp32T,
fp32T, fp16T},
SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp4e2m1T, bs32_fp8ue8m0_fp6e2m3T, fp16T, fp32T, fp32T,
+ fp16T, fp16T},
+ SpecificationVersion::V_1_1_DRAFT},
{{bs32_fp8ue8m0_fp4e2m1T, bs32_fp8ue8m0_fp6e2m3T, fp16T, fp32T, fp32T,
fp32T, fp16T},
SpecificationVersion::V_1_1_DRAFT},
@@ -1554,19 +1355,16 @@ extensionComplianceMap = {
fp32T, fp32T},
SpecificationVersion::V_1_1_DRAFT}},
allOf},
- {{Extension::bf16, Extension::mx_common, Extension::mx_fp6e2m3,
- Extension::mx_int8},
- {{{bs32_fp8ue8m0_fp6e2m3T, bs32_fp8ue8m0_mxint8T, fp16T, fp32T, fp32T,
- bf16T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_mxint8T, bs32_fp8ue8m0_fp6e2m3T, fp16T, fp32T, fp32T,
- bf16T, fp16T},
- SpecificationVersion::V_1_1_DRAFT}},
- allOf},
{{Extension::mx_common, Extension::mx_fp6e2m3, Extension::mx_int8},
{{{bs32_fp8ue8m0_fp6e2m3T, bs32_fp8ue8m0_mxint8T, fp16T, fp32T, fp32T,
+ fp16T, fp16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp6e2m3T, bs32_fp8ue8m0_mxint8T, fp16T, fp32T, fp32T,
fp32T, fp16T},
SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_mxint8T, bs32_fp8ue8m0_fp6e2m3T, fp16T, fp32T, fp32T,
+ fp16T, fp16T},
+ SpecificationVersion::V_1_1_DRAFT},
{{bs32_fp8ue8m0_mxint8T, bs32_fp8ue8m0_fp6e2m3T, fp16T, fp32T, fp32T,
fp32T, fp16T},
SpecificationVersion::V_1_1_DRAFT},
@@ -1577,19 +1375,16 @@ extensionComplianceMap = {
fp32T, fp32T},
SpecificationVersion::V_1_1_DRAFT}},
allOf},
- {{Extension::bf16, Extension::mx_common, Extension::mx_fp4e2m1,
- Extension::mx_int8},
- {{{bs32_fp8ue8m0_fp4e2m1T, bs32_fp8ue8m0_mxint8T, fp16T, fp32T, fp32T,
- bf16T, fp16T},
- SpecificationVersion::V_1_1_DRAFT},
- {{bs32_fp8ue8m0_mxint8T, bs32_fp8ue8m0_fp4e2m1T, fp16T, fp32T, fp32T,
- bf16T, fp16T},
- SpecificationVersion::V_1_1_DRAFT}},
- allOf},
{{Extension::mx_common, Extension::mx_fp4e2m1, Extension::mx_int8},
{{{bs32_fp8ue8m0_fp4e2m1T, bs32_fp8ue8m0_mxint8T, fp16T, fp32T, fp32T,
+ fp16T, fp16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp4e2m1T, bs32_fp8ue8m0_mxint8T, fp16T, fp32T, fp32T,
fp32T, fp16T},
SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_mxint8T, bs32_fp8ue8m0_fp4e2m1T, fp16T, fp32T, fp32T,
+ fp16T, fp16T},
+ SpecificationVersion::V_1_1_DRAFT},
{{bs32_fp8ue8m0_mxint8T, bs32_fp8ue8m0_fp4e2m1T, fp16T, fp32T, fp32T,
fp32T, fp16T},
SpecificationVersion::V_1_1_DRAFT},
@@ -1599,6 +1394,577 @@ extensionComplianceMap = {
{{bs32_fp8ue8m0_mxint8T, bs32_fp8ue8m0_fp4e2m1T, fp32T, fp32T, fp32T,
fp32T, fp32T},
SpecificationVersion::V_1_1_DRAFT}},
+ allOf},
+ {{Extension::bf16, Extension::fp8e4m3},
+ {{{fp8e4m3T, fp8e4m3T, bf16T, fp8e4m3T, fp8e4m3T, bf16T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{fp8e4m3T, fp8e4m3T, bf16T, fp8e4m3T, fp8e4m3T, fp32T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{fp8e4m3T, bf16T, bf16T, fp8e4m3T, bf16T, bf16T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{fp8e4m3T, bf16T, bf16T, fp8e4m3T, bf16T, fp32T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bf16T, fp8e4m3T, bf16T, bf16T, fp8e4m3T, bf16T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bf16T, fp8e4m3T, bf16T, bf16T, fp8e4m3T, fp32T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{fp8e4m3T, bf16T, fp32T, fp8e4m3T, bf16T, fp32T, fp32T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bf16T, fp8e4m3T, fp32T, bf16T, fp8e4m3T, fp32T, fp32T},
+ SpecificationVersion::V_1_1_DRAFT}},
+ allOf},
+ {{Extension::bf16, Extension::fp8e4m3, Extension::fp8e5m2},
+ {{{fp8e4m3T, fp8e5m2T, bf16T, fp8e4m3T, fp8e5m2T, bf16T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{fp8e4m3T, fp8e5m2T, bf16T, fp8e4m3T, fp8e5m2T, fp32T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{fp8e5m2T, fp8e4m3T, bf16T, fp8e5m2T, fp8e4m3T, bf16T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{fp8e5m2T, fp8e4m3T, bf16T, fp8e5m2T, fp8e4m3T, fp32T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT}},
+ allOf},
+ {{Extension::bf16, Extension::fp8e4m3, Extension::mx_common,
+ Extension::mx_fp8e4m3},
+ {{{fp8e4m3T, bs32_fp8ue8m0_fp8e4m3T, bf16T, fp8e4m3T, fp32T, bf16T,
+ bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{fp8e4m3T, bs32_fp8ue8m0_fp8e4m3T, bf16T, fp8e4m3T, fp32T, fp32T,
+ bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp8e4m3T, fp8e4m3T, bf16T, fp32T, fp8e4m3T, bf16T,
+ bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp8e4m3T, fp8e4m3T, bf16T, fp32T, fp8e4m3T, fp32T,
+ bf16T},
+ SpecificationVersion::V_1_1_DRAFT}},
+ allOf},
+ {{Extension::bf16, Extension::fp8e4m3, Extension::mx_common,
+ Extension::mx_fp8e5m2},
+ {{{fp8e4m3T, bs32_fp8ue8m0_fp8e5m2T, bf16T, fp8e4m3T, fp32T, bf16T,
+ bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{fp8e4m3T, bs32_fp8ue8m0_fp8e5m2T, bf16T, fp8e4m3T, fp32T, fp32T,
+ bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp8e5m2T, fp8e4m3T, bf16T, fp32T, fp8e4m3T, bf16T,
+ bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp8e5m2T, fp8e4m3T, bf16T, fp32T, fp8e4m3T, fp32T,
+ bf16T},
+ SpecificationVersion::V_1_1_DRAFT}},
+ allOf},
+ {{Extension::bf16, Extension::fp8e4m3, Extension::mx_common,
+ Extension::mx_fp6e3m2},
+ {{{fp8e4m3T, bs32_fp8ue8m0_fp6e3m2T, bf16T, fp8e4m3T, fp32T, bf16T,
+ bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{fp8e4m3T, bs32_fp8ue8m0_fp6e3m2T, bf16T, fp8e4m3T, fp32T, fp32T,
+ bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp6e3m2T, fp8e4m3T, bf16T, fp32T, fp8e4m3T, bf16T,
+ bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp6e3m2T, fp8e4m3T, bf16T, fp32T, fp8e4m3T, fp32T,
+ bf16T},
+ SpecificationVersion::V_1_1_DRAFT}},
+ allOf},
+ {{Extension::bf16, Extension::fp8e4m3, Extension::mx_common,
+ Extension::mx_fp6e2m3},
+ {{{fp8e4m3T, bs32_fp8ue8m0_fp6e2m3T, bf16T, fp8e4m3T, fp32T, bf16T,
+ bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{fp8e4m3T, bs32_fp8ue8m0_fp6e2m3T, bf16T, fp8e4m3T, fp32T, fp32T,
+ bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp6e2m3T, fp8e4m3T, bf16T, fp32T, fp8e4m3T, bf16T,
+ bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp6e2m3T, fp8e4m3T, bf16T, fp32T, fp8e4m3T, fp32T,
+ bf16T},
+ SpecificationVersion::V_1_1_DRAFT}},
+ allOf},
+ {{Extension::bf16, Extension::fp8e4m3, Extension::mx_common,
+ Extension::mx_fp4e2m1},
+ {{{fp8e4m3T, bs32_fp8ue8m0_fp4e2m1T, bf16T, fp8e4m3T, fp32T, bf16T,
+ bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{fp8e4m3T, bs32_fp8ue8m0_fp4e2m1T, bf16T, fp8e4m3T, fp32T, fp32T,
+ bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp4e2m1T, fp8e4m3T, bf16T, fp32T, fp8e4m3T, bf16T,
+ bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp4e2m1T, fp8e4m3T, bf16T, fp32T, fp8e4m3T, fp32T,
+ bf16T},
+ SpecificationVersion::V_1_1_DRAFT}},
+ allOf},
+ {{Extension::bf16, Extension::fp8e4m3, Extension::mx_common,
+ Extension::mx_int8},
+ {{{fp8e4m3T, bs32_fp8ue8m0_mxint8T, bf16T, fp8e4m3T, fp32T, bf16T,
+ bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{fp8e4m3T, bs32_fp8ue8m0_mxint8T, bf16T, fp8e4m3T, fp32T, fp32T,
+ bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_mxint8T, fp8e4m3T, bf16T, fp32T, fp8e4m3T, bf16T,
+ bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_mxint8T, fp8e4m3T, bf16T, fp32T, fp8e4m3T, fp32T,
+ bf16T},
+ SpecificationVersion::V_1_1_DRAFT}},
+ allOf},
+ {{Extension::bf16, Extension::fp8e5m2},
+ {{{fp8e5m2T, fp8e5m2T, bf16T, fp8e5m2T, fp8e5m2T, bf16T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{fp8e5m2T, fp8e5m2T, bf16T, fp8e5m2T, fp8e5m2T, fp32T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{fp8e5m2T, bf16T, bf16T, fp8e5m2T, bf16T, bf16T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{fp8e5m2T, bf16T, bf16T, fp8e5m2T, bf16T, fp32T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bf16T, fp8e5m2T, bf16T, bf16T, fp8e5m2T, bf16T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bf16T, fp8e5m2T, bf16T, bf16T, fp8e5m2T, fp32T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{fp8e5m2T, bf16T, fp32T, fp8e5m2T, bf16T, fp32T, fp32T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bf16T, fp8e5m2T, fp32T, bf16T, fp8e5m2T, fp32T, fp32T},
+ SpecificationVersion::V_1_1_DRAFT}},
+ allOf},
+ {{Extension::bf16, Extension::fp8e5m2, Extension::mx_common,
+ Extension::mx_fp8e4m3},
+ {{{fp8e5m2T, bs32_fp8ue8m0_fp8e4m3T, bf16T, fp8e5m2T, fp32T, bf16T,
+ bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{fp8e5m2T, bs32_fp8ue8m0_fp8e4m3T, bf16T, fp8e5m2T, fp32T, fp32T,
+ bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp8e4m3T, fp8e5m2T, bf16T, fp32T, fp8e5m2T, bf16T,
+ bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp8e4m3T, fp8e5m2T, bf16T, fp32T, fp8e5m2T, fp32T,
+ bf16T},
+ SpecificationVersion::V_1_1_DRAFT}},
+ allOf},
+ {{Extension::bf16, Extension::fp8e5m2, Extension::mx_common,
+ Extension::mx_fp8e5m2},
+ {{{fp8e5m2T, bs32_fp8ue8m0_fp8e5m2T, bf16T, fp8e5m2T, fp32T, bf16T,
+ bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{fp8e5m2T, bs32_fp8ue8m0_fp8e5m2T, bf16T, fp8e5m2T, fp32T, fp32T,
+ bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp8e5m2T, fp8e5m2T, bf16T, fp32T, fp8e5m2T, bf16T,
+ bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp8e5m2T, fp8e5m2T, bf16T, fp32T, fp8e5m2T, fp32T,
+ bf16T},
+ SpecificationVersion::V_1_1_DRAFT}},
+ allOf},
+ {{Extension::bf16, Extension::fp8e5m2, Extension::mx_common,
+ Extension::mx_fp6e3m2},
+ {{{fp8e5m2T, bs32_fp8ue8m0_fp6e3m2T, bf16T, fp8e5m2T, fp32T, bf16T,
+ bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{fp8e5m2T, bs32_fp8ue8m0_fp6e3m2T, bf16T, fp8e5m2T, fp32T, fp32T,
+ bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp6e3m2T, fp8e5m2T, bf16T, fp32T, fp8e5m2T, bf16T,
+ bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp6e3m2T, fp8e5m2T, bf16T, fp32T, fp8e5m2T, fp32T,
+ bf16T},
+ SpecificationVersion::V_1_1_DRAFT}},
+ allOf},
+ {{Extension::bf16, Extension::fp8e5m2, Extension::mx_common,
+ Extension::mx_fp6e2m3},
+ {{{fp8e5m2T, bs32_fp8ue8m0_fp6e2m3T, bf16T, fp8e5m2T, fp32T, bf16T,
+ bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{fp8e5m2T, bs32_fp8ue8m0_fp6e2m3T, bf16T, fp8e5m2T, fp32T, fp32T,
+ bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp6e2m3T, fp8e5m2T, bf16T, fp32T, fp8e5m2T, bf16T,
+ bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp6e2m3T, fp8e5m2T, bf16T, fp32T, fp8e5m2T, fp32T,
+ bf16T},
+ SpecificationVersion::V_1_1_DRAFT}},
+ allOf},
+ {{Extension::bf16, Extension::fp8e5m2, Extension::mx_common,
+ Extension::mx_fp4e2m1},
+ {{{fp8e5m2T, bs32_fp8ue8m0_fp4e2m1T, bf16T, fp8e5m2T, fp32T, bf16T,
+ bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{fp8e5m2T, bs32_fp8ue8m0_fp4e2m1T, bf16T, fp8e5m2T, fp32T, fp32T,
+ bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp4e2m1T, fp8e5m2T, bf16T, fp32T, fp8e5m2T, bf16T,
+ bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp4e2m1T, fp8e5m2T, bf16T, fp32T, fp8e5m2T, fp32T,
+ bf16T},
+ SpecificationVersion::V_1_1_DRAFT}},
+ allOf},
+ {{Extension::bf16, Extension::fp8e5m2, Extension::mx_common,
+ Extension::mx_int8},
+ {{{fp8e5m2T, bs32_fp8ue8m0_mxint8T, bf16T, fp8e5m2T, fp32T, bf16T,
+ bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{fp8e5m2T, bs32_fp8ue8m0_mxint8T, bf16T, fp8e5m2T, fp32T, fp32T,
+ bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_mxint8T, fp8e5m2T, bf16T, fp32T, fp8e5m2T, bf16T,
+ bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_mxint8T, fp8e5m2T, bf16T, fp32T, fp8e5m2T, fp32T,
+ bf16T},
+ SpecificationVersion::V_1_1_DRAFT}},
+ allOf},
+ {{Extension::bf16, Extension::mx_common, Extension::mx_fp8e4m3},
+ {{{bf16T, bs32_fp8ue8m0_fp8e4m3T, bf16T, bf16T, fp32T, bf16T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bf16T, bs32_fp8ue8m0_fp8e4m3T, bf16T, bf16T, fp32T, fp32T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp8e4m3T, bf16T, bf16T, fp32T, bf16T, bf16T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp8e4m3T, bf16T, bf16T, fp32T, bf16T, fp32T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp8e4m3T, bs32_fp8ue8m0_fp8e4m3T, bf16T, fp32T, fp32T,
+ bf16T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp8e4m3T, bs32_fp8ue8m0_fp8e4m3T, bf16T, fp32T, fp32T,
+ fp32T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bf16T, bs32_fp8ue8m0_fp8e4m3T, fp32T, bf16T, fp32T, fp32T, fp32T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp8e4m3T, bf16T, fp32T, fp32T, bf16T, fp32T, fp32T},
+ SpecificationVersion::V_1_1_DRAFT}},
+ allOf},
+ {{Extension::bf16, Extension::mx_common, Extension::mx_fp8e5m2},
+ {{{bf16T, bs32_fp8ue8m0_fp8e5m2T, bf16T, bf16T, fp32T, bf16T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bf16T, bs32_fp8ue8m0_fp8e5m2T, bf16T, bf16T, fp32T, fp32T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp8e5m2T, bf16T, bf16T, fp32T, bf16T, bf16T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp8e5m2T, bf16T, bf16T, fp32T, bf16T, fp32T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp8e5m2T, bs32_fp8ue8m0_fp8e5m2T, bf16T, fp32T, fp32T,
+ bf16T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp8e5m2T, bs32_fp8ue8m0_fp8e5m2T, bf16T, fp32T, fp32T,
+ fp32T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bf16T, bs32_fp8ue8m0_fp8e5m2T, fp32T, bf16T, fp32T, fp32T, fp32T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp8e5m2T, bf16T, fp32T, fp32T, bf16T, fp32T, fp32T},
+ SpecificationVersion::V_1_1_DRAFT}},
+ allOf},
+ {{Extension::bf16, Extension::mx_common, Extension::mx_fp6e3m2},
+ {{{bf16T, bs32_fp8ue8m0_fp6e3m2T, bf16T, bf16T, fp32T, bf16T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bf16T, bs32_fp8ue8m0_fp6e3m2T, bf16T, bf16T, fp32T, fp32T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp6e3m2T, bf16T, bf16T, fp32T, bf16T, bf16T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp6e3m2T, bf16T, bf16T, fp32T, bf16T, fp32T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp6e3m2T, bs32_fp8ue8m0_fp6e3m2T, bf16T, fp32T, fp32T,
+ bf16T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp6e3m2T, bs32_fp8ue8m0_fp6e3m2T, bf16T, fp32T, fp32T,
+ fp32T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bf16T, bs32_fp8ue8m0_fp6e3m2T, fp32T, bf16T, fp32T, fp32T, fp32T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp6e3m2T, bf16T, fp32T, fp32T, bf16T, fp32T, fp32T},
+ SpecificationVersion::V_1_1_DRAFT}},
+ allOf},
+ {{Extension::bf16, Extension::mx_common, Extension::mx_fp6e2m3},
+ {{{bf16T, bs32_fp8ue8m0_fp6e2m3T, bf16T, bf16T, fp32T, bf16T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bf16T, bs32_fp8ue8m0_fp6e2m3T, bf16T, bf16T, fp32T, fp32T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp6e2m3T, bf16T, bf16T, fp32T, bf16T, bf16T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp6e2m3T, bf16T, bf16T, fp32T, bf16T, fp32T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp6e2m3T, bs32_fp8ue8m0_fp6e2m3T, bf16T, fp32T, fp32T,
+ bf16T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp6e2m3T, bs32_fp8ue8m0_fp6e2m3T, bf16T, fp32T, fp32T,
+ fp32T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bf16T, bs32_fp8ue8m0_fp6e2m3T, fp32T, bf16T, fp32T, fp32T, fp32T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp6e2m3T, bf16T, fp32T, fp32T, bf16T, fp32T, fp32T},
+ SpecificationVersion::V_1_1_DRAFT}},
+ allOf},
+ {{Extension::bf16, Extension::mx_common, Extension::mx_fp4e2m1},
+ {{{bf16T, bs32_fp8ue8m0_fp4e2m1T, bf16T, bf16T, fp32T, bf16T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bf16T, bs32_fp8ue8m0_fp4e2m1T, bf16T, bf16T, fp32T, fp32T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp4e2m1T, bf16T, bf16T, fp32T, bf16T, bf16T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp4e2m1T, bf16T, bf16T, fp32T, bf16T, fp32T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp4e2m1T, bs32_fp8ue8m0_fp4e2m1T, bf16T, fp32T, fp32T,
+ bf16T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp4e2m1T, bs32_fp8ue8m0_fp4e2m1T, bf16T, fp32T, fp32T,
+ fp32T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bf16T, bs32_fp8ue8m0_fp4e2m1T, fp32T, bf16T, fp32T, fp32T, fp32T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp4e2m1T, bf16T, fp32T, fp32T, bf16T, fp32T, fp32T},
+ SpecificationVersion::V_1_1_DRAFT}},
+ allOf},
+ {{Extension::bf16, Extension::mx_common, Extension::mx_int8},
+ {{{bf16T, bs32_fp8ue8m0_mxint8T, bf16T, bf16T, fp32T, bf16T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bf16T, bs32_fp8ue8m0_mxint8T, bf16T, bf16T, fp32T, fp32T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_mxint8T, bf16T, bf16T, fp32T, bf16T, bf16T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_mxint8T, bf16T, bf16T, fp32T, bf16T, fp32T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_mxint8T, bs32_fp8ue8m0_mxint8T, bf16T, fp32T, fp32T,
+ bf16T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_mxint8T, bs32_fp8ue8m0_mxint8T, bf16T, fp32T, fp32T,
+ fp32T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bf16T, bs32_fp8ue8m0_mxint8T, fp32T, bf16T, fp32T, fp32T, fp32T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_mxint8T, bf16T, fp32T, fp32T, bf16T, fp32T, fp32T},
+ SpecificationVersion::V_1_1_DRAFT}},
+ allOf},
+ {{Extension::bf16, Extension::mx_common, Extension::mx_fp8e4m3,
+ Extension::mx_fp8e5m2},
+ {{{bs32_fp8ue8m0_fp8e4m3T, bs32_fp8ue8m0_fp8e5m2T, bf16T, fp32T, fp32T,
+ bf16T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp8e4m3T, bs32_fp8ue8m0_fp8e5m2T, bf16T, fp32T, fp32T,
+ fp32T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp8e5m2T, bs32_fp8ue8m0_fp8e4m3T, bf16T, fp32T, fp32T,
+ bf16T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp8e5m2T, bs32_fp8ue8m0_fp8e4m3T, bf16T, fp32T, fp32T,
+ fp32T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT}},
+ allOf},
+ {{Extension::bf16, Extension::mx_common, Extension::mx_fp6e3m2,
+ Extension::mx_fp8e4m3},
+ {{{bs32_fp8ue8m0_fp8e4m3T, bs32_fp8ue8m0_fp6e3m2T, bf16T, fp32T, fp32T,
+ bf16T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp8e4m3T, bs32_fp8ue8m0_fp6e3m2T, bf16T, fp32T, fp32T,
+ fp32T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp6e3m2T, bs32_fp8ue8m0_fp8e4m3T, bf16T, fp32T, fp32T,
+ bf16T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp6e3m2T, bs32_fp8ue8m0_fp8e4m3T, bf16T, fp32T, fp32T,
+ fp32T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT}},
+ allOf},
+ {{Extension::bf16, Extension::mx_common, Extension::mx_fp6e2m3,
+ Extension::mx_fp8e4m3},
+ {{{bs32_fp8ue8m0_fp8e4m3T, bs32_fp8ue8m0_fp6e2m3T, bf16T, fp32T, fp32T,
+ bf16T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp8e4m3T, bs32_fp8ue8m0_fp6e2m3T, bf16T, fp32T, fp32T,
+ fp32T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp6e2m3T, bs32_fp8ue8m0_fp8e4m3T, bf16T, fp32T, fp32T,
+ bf16T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp6e2m3T, bs32_fp8ue8m0_fp8e4m3T, bf16T, fp32T, fp32T,
+ fp32T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT}},
+ allOf},
+ {{Extension::bf16, Extension::mx_common, Extension::mx_fp4e2m1,
+ Extension::mx_fp8e4m3},
+ {{{bs32_fp8ue8m0_fp8e4m3T, bs32_fp8ue8m0_fp4e2m1T, bf16T, fp32T, fp32T,
+ bf16T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp8e4m3T, bs32_fp8ue8m0_fp4e2m1T, bf16T, fp32T, fp32T,
+ fp32T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp4e2m1T, bs32_fp8ue8m0_fp8e4m3T, bf16T, fp32T, fp32T,
+ bf16T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp4e2m1T, bs32_fp8ue8m0_fp8e4m3T, bf16T, fp32T, fp32T,
+ fp32T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT}},
+ allOf},
+ {{Extension::bf16, Extension::mx_common, Extension::mx_fp8e4m3,
+ Extension::mx_int8},
+ {{{bs32_fp8ue8m0_fp8e4m3T, bs32_fp8ue8m0_mxint8T, bf16T, fp32T, fp32T,
+ bf16T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp8e4m3T, bs32_fp8ue8m0_mxint8T, bf16T, fp32T, fp32T,
+ fp32T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_mxint8T, bs32_fp8ue8m0_fp8e4m3T, bf16T, fp32T, fp32T,
+ bf16T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_mxint8T, bs32_fp8ue8m0_fp8e4m3T, bf16T, fp32T, fp32T,
+ fp32T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT}},
+ allOf},
+ {{Extension::bf16, Extension::mx_common, Extension::mx_fp6e3m2,
+ Extension::mx_fp8e5m2},
+ {{{bs32_fp8ue8m0_fp8e5m2T, bs32_fp8ue8m0_fp6e3m2T, bf16T, fp32T, fp32T,
+ bf16T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp8e5m2T, bs32_fp8ue8m0_fp6e3m2T, bf16T, fp32T, fp32T,
+ fp32T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp6e3m2T, bs32_fp8ue8m0_fp8e5m2T, bf16T, fp32T, fp32T,
+ bf16T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp6e3m2T, bs32_fp8ue8m0_fp8e5m2T, bf16T, fp32T, fp32T,
+ fp32T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT}},
+ allOf},
+ {{Extension::bf16, Extension::mx_common, Extension::mx_fp6e2m3,
+ Extension::mx_fp8e5m2},
+ {{{bs32_fp8ue8m0_fp8e5m2T, bs32_fp8ue8m0_fp6e2m3T, bf16T, fp32T, fp32T,
+ bf16T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp8e5m2T, bs32_fp8ue8m0_fp6e2m3T, bf16T, fp32T, fp32T,
+ fp32T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp6e2m3T, bs32_fp8ue8m0_fp8e5m2T, bf16T, fp32T, fp32T,
+ bf16T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp6e2m3T, bs32_fp8ue8m0_fp8e5m2T, bf16T, fp32T, fp32T,
+ fp32T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT}},
+ allOf},
+ {{Extension::bf16, Extension::mx_common, Extension::mx_fp4e2m1,
+ Extension::mx_fp8e5m2},
+ {{{bs32_fp8ue8m0_fp8e5m2T, bs32_fp8ue8m0_fp4e2m1T, bf16T, fp32T, fp32T,
+ bf16T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp8e5m2T, bs32_fp8ue8m0_fp4e2m1T, bf16T, fp32T, fp32T,
+ fp32T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp4e2m1T, bs32_fp8ue8m0_fp8e5m2T, bf16T, fp32T, fp32T,
+ bf16T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp4e2m1T, bs32_fp8ue8m0_fp8e5m2T, bf16T, fp32T, fp32T,
+ fp32T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT}},
+ allOf},
+ {{Extension::bf16, Extension::mx_common, Extension::mx_fp8e5m2,
+ Extension::mx_int8},
+ {{{bs32_fp8ue8m0_fp8e5m2T, bs32_fp8ue8m0_mxint8T, bf16T, fp32T, fp32T,
+ bf16T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp8e5m2T, bs32_fp8ue8m0_mxint8T, bf16T, fp32T, fp32T,
+ fp32T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_mxint8T, bs32_fp8ue8m0_fp8e5m2T, bf16T, fp32T, fp32T,
+ bf16T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_mxint8T, bs32_fp8ue8m0_fp8e5m2T, bf16T, fp32T, fp32T,
+ fp32T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT}},
+ allOf},
+ {{Extension::bf16, Extension::mx_common, Extension::mx_fp6e2m3,
+ Extension::mx_fp6e3m2},
+ {{{bs32_fp8ue8m0_fp6e3m2T, bs32_fp8ue8m0_fp6e2m3T, bf16T, fp32T, fp32T,
+ bf16T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp6e3m2T, bs32_fp8ue8m0_fp6e2m3T, bf16T, fp32T, fp32T,
+ fp32T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp6e2m3T, bs32_fp8ue8m0_fp6e3m2T, bf16T, fp32T, fp32T,
+ bf16T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp6e2m3T, bs32_fp8ue8m0_fp6e3m2T, bf16T, fp32T, fp32T,
+ fp32T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT}},
+ allOf},
+ {{Extension::bf16, Extension::mx_common, Extension::mx_fp4e2m1,
+ Extension::mx_fp6e3m2},
+ {{{bs32_fp8ue8m0_fp6e3m2T, bs32_fp8ue8m0_fp4e2m1T, bf16T, fp32T, fp32T,
+ bf16T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp6e3m2T, bs32_fp8ue8m0_fp4e2m1T, bf16T, fp32T, fp32T,
+ fp32T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp4e2m1T, bs32_fp8ue8m0_fp6e3m2T, bf16T, fp32T, fp32T,
+ bf16T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp4e2m1T, bs32_fp8ue8m0_fp6e3m2T, bf16T, fp32T, fp32T,
+ fp32T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT}},
+ allOf},
+ {{Extension::bf16, Extension::mx_common, Extension::mx_fp6e3m2,
+ Extension::mx_int8},
+ {{{bs32_fp8ue8m0_fp6e3m2T, bs32_fp8ue8m0_mxint8T, bf16T, fp32T, fp32T,
+ bf16T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp6e3m2T, bs32_fp8ue8m0_mxint8T, bf16T, fp32T, fp32T,
+ fp32T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_mxint8T, bs32_fp8ue8m0_fp6e3m2T, bf16T, fp32T, fp32T,
+ bf16T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_mxint8T, bs32_fp8ue8m0_fp6e3m2T, bf16T, fp32T, fp32T,
+ fp32T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT}},
+ allOf},
+ {{Extension::bf16, Extension::mx_common, Extension::mx_fp4e2m1,
+ Extension::mx_fp6e2m3},
+ {{{bs32_fp8ue8m0_fp6e2m3T, bs32_fp8ue8m0_fp4e2m1T, bf16T, fp32T, fp32T,
+ bf16T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp6e2m3T, bs32_fp8ue8m0_fp4e2m1T, bf16T, fp32T, fp32T,
+ fp32T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp4e2m1T, bs32_fp8ue8m0_fp6e2m3T, bf16T, fp32T, fp32T,
+ bf16T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp4e2m1T, bs32_fp8ue8m0_fp6e2m3T, bf16T, fp32T, fp32T,
+ fp32T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT}},
+ allOf},
+ {{Extension::bf16, Extension::mx_common, Extension::mx_fp6e2m3,
+ Extension::mx_int8},
+ {{{bs32_fp8ue8m0_fp6e2m3T, bs32_fp8ue8m0_mxint8T, bf16T, fp32T, fp32T,
+ bf16T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp6e2m3T, bs32_fp8ue8m0_mxint8T, bf16T, fp32T, fp32T,
+ fp32T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_mxint8T, bs32_fp8ue8m0_fp6e2m3T, bf16T, fp32T, fp32T,
+ bf16T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_mxint8T, bs32_fp8ue8m0_fp6e2m3T, bf16T, fp32T, fp32T,
+ fp32T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT}},
+ allOf},
+ {{Extension::bf16, Extension::mx_common, Extension::mx_fp4e2m1,
+ Extension::mx_int8},
+ {{{bs32_fp8ue8m0_fp4e2m1T, bs32_fp8ue8m0_mxint8T, bf16T, fp32T, fp32T,
+ bf16T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_fp4e2m1T, bs32_fp8ue8m0_mxint8T, bf16T, fp32T, fp32T,
+ fp32T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_mxint8T, bs32_fp8ue8m0_fp4e2m1T, bf16T, fp32T, fp32T,
+ bf16T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT},
+ {{bs32_fp8ue8m0_mxint8T, bs32_fp8ue8m0_fp4e2m1T, bf16T, fp32T, fp32T,
+ fp32T, bf16T},
+ SpecificationVersion::V_1_1_DRAFT}},
allOf}}},
{"tosa.conv2d_block_scaled",
{{{Extension::mxfp_conv},
diff --git a/mlir/test/Dialect/Tosa/invalid_extension.mlir b/mlir/test/Dialect/Tosa/invalid_extension.mlir
index a1e5e28076349..62020068caa3a 100644
--- a/mlir/test/Dialect/Tosa/invalid_extension.mlir
+++ b/mlir/test/Dialect/Tosa/invalid_extension.mlir
@@ -26,12 +26,12 @@ func.func @test_conv2d(%arg0: tensor<1x4x4x4xi8>, %arg1: tensor<8x1x1x4xi4>, %ar
}
// -----
-func.func @test_conv2d_mxfp(%arg0: tensor<1x4x4x32x!tosa.block_scaled<BLOCK_SHAPE_32:f8E8M0FNU:f4E2M1FN>>, %arg1: tensor<8x1x1x32x!tosa.block_scaled<BLOCK_SHAPE_32:f8E8M0FNU:f4E2M1FN>>, %arg2: tensor<8xf16>) -> tensor<1x4x4x8xf16> {
+func.func @test_conv2d_mxfp(%arg0: tensor<1x4x4x32x!tosa.block_scaled<BLOCK_SHAPE_32:f8E8M0FNU:f4E2M1FN>>, %arg1: tensor<8x1x1x32x!tosa.block_scaled<BLOCK_SHAPE_32:f8E8M0FNU:f4E2M1FN>>, %arg2: tensor<8xbf16>) -> tensor<1x4x4x8xbf16> {
%input_zp = "tosa.const"() <{values = dense<0.0> : tensor<1xf32>}> : () -> tensor<1xf32>
%weight_zp = "tosa.const"() <{values = dense<0.0> : tensor<1xf32>}> : () -> tensor<1xf32>
// expected-error at +1 {{'tosa.conv2d' op illegal: requires all of [bf16, mx_common, mx_fp4e2m1] profiles/extensions to be specified in the target environment}}
- %0 = tosa.conv2d %arg0, %arg1, %arg2, %input_zp, %weight_zp {acc_type = bf16, dilation = array<i64: 1, 1>, pad = array<i64: 0, 0, 0, 0>, stride = array<i64: 1, 1>, local_bound = true} : (tensor<1x4x4x32x!tosa.block_scaled<BLOCK_SHAPE_32:f8E8M0FNU:f4E2M1FN>>, tensor<8x1x1x32x!tosa.block_scaled<BLOCK_SHAPE_32:f8E8M0FNU:f4E2M1FN>>, tensor<8xf16>, tensor<1xf32>, tensor<1xf32>) -> tensor<1x4x4x8xf16>
- return %0 : tensor<1x4x4x8xf16>
+ %0 = tosa.conv2d %arg0, %arg1, %arg2, %input_zp, %weight_zp {acc_type = bf16, dilation = array<i64: 1, 1>, pad = array<i64: 0, 0, 0, 0>, stride = array<i64: 1, 1>, local_bound = true} : (tensor<1x4x4x32x!tosa.block_scaled<BLOCK_SHAPE_32:f8E8M0FNU:f4E2M1FN>>, tensor<8x1x1x32x!tosa.block_scaled<BLOCK_SHAPE_32:f8E8M0FNU:f4E2M1FN>>, tensor<8xbf16>, tensor<1xf32>, tensor<1xf32>) -> tensor<1x4x4x8xbf16>
+ return %0 : tensor<1x4x4x8xbf16>
}
// -----
diff --git a/mlir/test/Dialect/Tosa/tosa-validation-version-1p0-invalid.mlir b/mlir/test/Dialect/Tosa/tosa-validation-version-1p0-invalid.mlir
index c8baf1effb344..a3ee9fd96b01c 100644
--- a/mlir/test/Dialect/Tosa/tosa-validation-version-1p0-invalid.mlir
+++ b/mlir/test/Dialect/Tosa/tosa-validation-version-1p0-invalid.mlir
@@ -42,12 +42,12 @@ func.func @test_conv2d_fp8_acc32(%arg0: tensor<1x4x4x4xf8E5M2>, %arg1: tensor<8x
// -----
-func.func @test_conv2d_mxfp(%arg0: tensor<1x4x4x32x!tosa.block_scaled<BLOCK_SHAPE_32:f8E8M0FNU:f4E2M1FN>>, %arg1: tensor<8x1x1x32x!tosa.block_scaled<BLOCK_SHAPE_32:f8E8M0FNU:f4E2M1FN>>, %arg2: tensor<8xf16>) -> tensor<1x4x4x8xf16> {
+func.func @test_conv2d_mxfp(%arg0: tensor<1x4x4x32x!tosa.block_scaled<BLOCK_SHAPE_32:f8E8M0FNU:f4E2M1FN>>, %arg1: tensor<8x1x1x32x!tosa.block_scaled<BLOCK_SHAPE_32:f8E8M0FNU:f4E2M1FN>>, %arg2: tensor<8xbf16>) -> tensor<1x4x4x8xbf16> {
%input_zp = "tosa.const"() <{values = dense<0.0> : tensor<1xf32>}> : () -> tensor<1xf32>
%weight_zp = "tosa.const"() <{values = dense<0.0> : tensor<1xf32>}> : () -> tensor<1xf32>
// expected-error at +1 {{'tosa.conv2d' op illegal: requires specification version compatible with 1.1.draft (got 1.0) and requires all of [bf16, mx_common, mx_fp4e2m1] profiles/extensions to be specified in the target environment}}
- %0 = tosa.conv2d %arg0, %arg1, %arg2, %input_zp, %weight_zp {acc_type = bf16, dilation = array<i64: 1, 1>, pad = array<i64: 0, 0, 0, 0>, stride = array<i64: 1, 1>, local_bound = true} : (tensor<1x4x4x32x!tosa.block_scaled<BLOCK_SHAPE_32:f8E8M0FNU:f4E2M1FN>>, tensor<8x1x1x32x!tosa.block_scaled<BLOCK_SHAPE_32:f8E8M0FNU:f4E2M1FN>>, tensor<8xf16>, tensor<1xf32>, tensor<1xf32>) -> tensor<1x4x4x8xf16>
- return %0 : tensor<1x4x4x8xf16>
+ %0 = tosa.conv2d %arg0, %arg1, %arg2, %input_zp, %weight_zp {acc_type = bf16, dilation = array<i64: 1, 1>, pad = array<i64: 0, 0, 0, 0>, stride = array<i64: 1, 1>, local_bound = true} : (tensor<1x4x4x32x!tosa.block_scaled<BLOCK_SHAPE_32:f8E8M0FNU:f4E2M1FN>>, tensor<8x1x1x32x!tosa.block_scaled<BLOCK_SHAPE_32:f8E8M0FNU:f4E2M1FN>>, tensor<8xbf16>, tensor<1xf32>, tensor<1xf32>) -> tensor<1x4x4x8xbf16>
+ return %0 : tensor<1x4x4x8xbf16>
}
// -----
diff --git a/mlir/test/Dialect/Tosa/tosa-validation-version-1p1-valid.mlir b/mlir/test/Dialect/Tosa/tosa-validation-version-1p1-valid.mlir
index 071db7a1ffc1b..2a9f9287d1f7b 100644
--- a/mlir/test/Dialect/Tosa/tosa-validation-version-1p1-valid.mlir
+++ b/mlir/test/Dialect/Tosa/tosa-validation-version-1p1-valid.mlir
@@ -76,7 +76,7 @@ func.func @test_conv2d_fp8_acc32(%arg0: tensor<1x4x4x4xf8E5M2>, %arg1: tensor<8x
func.func @test_conv2d_mxfp(%arg0: tensor<1x4x4x32x!tosa.block_scaled<BLOCK_SHAPE_32:f8E8M0FNU:f4E2M1FN>>, %arg1: tensor<8x1x1x32x!tosa.block_scaled<BLOCK_SHAPE_32:f8E8M0FNU:f4E2M1FN>>, %arg2: tensor<8xf16>) -> tensor<1x4x4x8xf16> {
%input_zp = "tosa.const"() <{values = dense<0.0> : tensor<1xf32>}> : () -> tensor<1xf32>
%weight_zp = "tosa.const"() <{values = dense<0.0> : tensor<1xf32>}> : () -> tensor<1xf32>
- %0 = tosa.conv2d %arg0, %arg1, %arg2, %input_zp, %weight_zp {acc_type = bf16, dilation = array<i64: 1, 1>, pad = array<i64: 0, 0, 0, 0>, stride = array<i64: 1, 1>, local_bound = true} : (tensor<1x4x4x32x!tosa.block_scaled<BLOCK_SHAPE_32:f8E8M0FNU:f4E2M1FN>>, tensor<8x1x1x32x!tosa.block_scaled<BLOCK_SHAPE_32:f8E8M0FNU:f4E2M1FN>>, tensor<8xf16>, tensor<1xf32>, tensor<1xf32>) -> tensor<1x4x4x8xf16>
+ %0 = tosa.conv2d %arg0, %arg1, %arg2, %input_zp, %weight_zp {acc_type = f16, dilation = array<i64: 1, 1>, pad = array<i64: 0, 0, 0, 0>, stride = array<i64: 1, 1>, local_bound = true} : (tensor<1x4x4x32x!tosa.block_scaled<BLOCK_SHAPE_32:f8E8M0FNU:f4E2M1FN>>, tensor<8x1x1x32x!tosa.block_scaled<BLOCK_SHAPE_32:f8E8M0FNU:f4E2M1FN>>, tensor<8xf16>, tensor<1xf32>, tensor<1xf32>) -> tensor<1x4x4x8xf16>
return %0 : tensor<1x4x4x8xf16>
}
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