[Mlir-commits] [clang] [llvm] [mlir] [AMDGPU] Fix missing cache bypass scope on seq_cst buffer fat pointer atomics (PR #213585)

[Krzysztof Drewniak]

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@@ -4937,6 +5019,81 @@ static Value *upgradeAMDGCNIntrinsicCall(StringRef Name, CallBase *CI,
     return UpgradeLegacyWMMAIUIntrinsicCall(F, CI, Builder, {T1, T2, T3, T4});
   }
 
+  // Legacy buffer atomic/store/atomic-load intrinsics missed the trailing
+  // syncscope metadata operand. Append an empty MDNode, meaning "no scope
+  // info", matching the behavior of these calls before the operand existed.
+  auto UpgradeBufferScopeIntrinsicCall =
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krzysz00 wrote:

Maybe this is "AddDefaultScopeToBufferCall"?

https://github.com/llvm/llvm-project/pull/213585