[Mlir-commits] [clang] [llvm] [mlir] [AMDGPU] Fix missing cache bypass scope on seq_cst buffer fat pointer atomics (PR #213585)

[Krzysztof Drewniak]

https://github.com/krzysz00 commented:

1. If we're doing this strategy, we should do it for loads too
2. We could instead handle the rewrite to cache bits in LowerBufferFatPointers
3. However, if we're going to do metadata, I'd say we should do `{ordering, scope}` as the metadata, allowing us to reserve `{}` for "not atomic". (We can probably upgrade the `_atomic_*` intrinsics to `{"monototic", ""}`, but I'm not 100% confident in this)

https://github.com/llvm/llvm-project/pull/213585