[Mlir-commits] [mlir] [mlir][mem2reg] Promote whole-buffer memref to a vector SSA value (PR #211880)

Andrzej WarzyƄski llvmlistbot at llvm.org
Thu Aug 6 02:59:12 PDT 2026


https://github.com/banach-space commented:

Thanks, the updated summary provides a good justification for this change, thank you!

Since the implementation has already been reviewed, I've only skimmed through. My only ask is extend the support to make this more widely applicable. See my inline comments. Thank you!

https://github.com/llvm/llvm-project/pull/211880


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