[Mlir-commits] [mlir] [MLIR][GPU] Lower remaining Math ops in the XeVM pipeline (PR #213874)
llvmlistbot at llvm.org
llvmlistbot at llvm.org
Tue Aug 4 05:34:45 PDT 2026
maxxlife wrote:
So I tested the exact reproducer from #213583 with #184370, this PR, and both changes combined. With both changes applied,` math.isinf` was successfully lowered inside the device module:
`%3 = "llvm.intr.is.fpclass"(%2) <{bit = 516 : i32}> : (f32) -> i1`
This indicates that the pipeline placement introduced byt the #213874 is necessary, but is not sufficient on the current main without an math::IsInfOp conversion pattern. The complete fix appears to require both this PR and the IsInfOpLowering indtroduced by #184370.
For this PR it might make sense to depend on #184370.
https://github.com/llvm/llvm-project/pull/213874
More information about the Mlir-commits
mailing list