[Mlir-commits] [llvm] [mlir] [NVVM][NVPTX] Change S2G reduction ops to use flag for reduction ops (PR #213638)
Durgadoss R
llvmlistbot at llvm.org
Mon Aug 3 05:01:45 PDT 2026
================
@@ -2833,16 +2833,22 @@ foreach dim = 1...5 in {
[llvm_i1_ty], // Flag for cache_hint
[IntrConvergent, ReadOnly<ArgIndex<0>>, ReadOnly<ArgIndex<1>>]>;
- // Intrinsics for TMA Copy with reduction
- foreach red_op = ["add", "min", "max", "inc", "dec", "and", "or", "xor"] in
- def int_nvvm_cp_async_bulk_tensor_reduce_ # red_op # _ # mode # _ # dim # d :
- DefaultAttrsIntrinsicFlags<[],
- !listconcat([llvm_shared_ptr_ty, // src_smem_ptr
- llvm_ptr_ty], // tensormap_ptr
- tensor_dim_args, // actual tensor dims
- [llvm_i64_ty]), // cache_hint
- [llvm_i1_ty], // Flag for cache_hint
- [IntrConvergent, ReadOnly<ArgIndex<0>>, ReadOnly<ArgIndex<1>>]>;
+ defvar reduce_params =
+ !listconcat([llvm_shared_ptr_ty, // src_smem_ptr
+ llvm_ptr_ty], // tensormap_ptr
+ tensor_dim_args, // actual tensor dims
+ [llvm_i64_ty]); // cache_hint
+ defvar red_op_idx = !size(reduce_params);
+ def int_nvvm_cp_async_bulk_tensor_reduce_ # mode # _ # dim # d :
+ DefaultAttrsIntrinsicFlags<[],
+ reduce_params,
+ [llvm_i32_ty, // reduction operation
----------------
durga4github wrote:
nit: flag for reduction operation (to align with the line below)
https://github.com/llvm/llvm-project/pull/213638
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