[Mlir-commits] [mlir] [mlir][SPIR-V] Add CL fclamp, s_clamp and u_clamp ops (PR #213594)

[llvmlistbot at llvm.org]

llvmorg-github-actions[bot] wrote:


<!--LLVM PR SUMMARY COMMENT-->

@llvm/pr-subscribers-mlir

Author: Arseniy Obolenskiy (aobolensk)

<details>
<summary>Changes</summary>



---
Full diff: https://github.com/llvm/llvm-project/pull/213594.diff


3 Files Affected:

- (modified) mlir/include/mlir/Dialect/SPIRV/IR/SPIRVCLOps.td (+71) 
- (modified) mlir/test/Dialect/SPIRV/IR/ocl-ops.mlir (+52) 
- (modified) mlir/test/Target/SPIRV/ocl-ops.mlir (+10) 


``````````diff
diff --git a/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVCLOps.td b/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVCLOps.td
index 7c1ca28f728e9..a330ae38cf9d9 100644
--- a/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVCLOps.td
+++ b/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVCLOps.td
@@ -583,6 +583,29 @@ def SPIRV_CLFMinOp : SPIRV_CLBinaryArithmeticOp<"fmin", 28, SPIRV_Float> {
 
 // -----
 
+def SPIRV_CLFClampOp : SPIRV_CLTernaryArithmeticOp<"fclamp", 95, SPIRV_Float> {
+  let summary = "Clamp x between min and max values.";
+
+  let description = [{
+    Returns min(max(x, minval), maxval).
+
+    Result Type, x, minval and maxval must be floating-point or
+    vector(2,3,4,8,16) of floating-point values.
+
+    All of the operands, including the Result Type operand, must be of the
+    same type.
+
+    #### Example:
+
+    ```mlir
+    %0 = spirv.CL.fclamp %x, %min, %max : f32
+    %1 = spirv.CL.fclamp %x, %min, %max : vector<3xf16>
+    ```
+  }];
+}
+
+// -----
+
 def SPIRV_CLFdimOp : SPIRV_CLBinaryArithmeticOp<"fdim", 24, SPIRV_Float> {
   let summary = "Compute the positive difference between x and y.";
 
@@ -1041,6 +1064,54 @@ def SPIRV_CLSAbsOp : SPIRV_CLUnaryArithmeticOp<"s_abs", 141, SPIRV_Integer> {
 
 // -----
 
+def SPIRV_CLSClampOp : SPIRV_CLTernaryArithmeticOp<"s_clamp", 149, SPIRV_Integer> {
+  let summary = "Clamp x between min and max values.";
+
+  let description = [{
+    Returns min(max(x, minval), maxval), where x, minval and maxval are
+    interpreted as signed integers.
+
+    Result Type, x, minval and maxval must be integer or vector(2,3,4,8,16)
+    of integer values.
+
+    All of the operands, including the Result Type operand, must be of the
+    same type.
+
+    #### Example:
+
+    ```mlir
+    %0 = spirv.CL.s_clamp %x, %min, %max : i32
+    %1 = spirv.CL.s_clamp %x, %min, %max : vector<3xi16>
+    ```
+  }];
+}
+
+// -----
+
+def SPIRV_CLUClampOp : SPIRV_CLTernaryArithmeticOp<"u_clamp", 150, SPIRV_Integer> {
+  let summary = "Clamp x between min and max values.";
+
+  let description = [{
+    Returns min(max(x, minval), maxval), where x, minval and maxval are
+    interpreted as unsigned integers.
+
+    Result Type, x, minval and maxval must be integer or vector(2,3,4,8,16)
+    of integer values.
+
+    All of the operands, including the Result Type operand, must be of the
+    same type.
+
+    #### Example:
+
+    ```mlir
+    %0 = spirv.CL.u_clamp %x, %min, %max : i32
+    %1 = spirv.CL.u_clamp %x, %min, %max : vector<3xi16>
+    ```
+  }];
+}
+
+// -----
+
 def SPIRV_CLClzOp : SPIRV_CLUnaryArithmeticOp<"clz", 151, SPIRV_Integer> {
   let summary = "Count leading zeros in operand";
 
diff --git a/mlir/test/Dialect/SPIRV/IR/ocl-ops.mlir b/mlir/test/Dialect/SPIRV/IR/ocl-ops.mlir
index da470f4e08109..468a710c13a91 100644
--- a/mlir/test/Dialect/SPIRV/IR/ocl-ops.mlir
+++ b/mlir/test/Dialect/SPIRV/IR/ocl-ops.mlir
@@ -458,6 +458,58 @@ func.func @mix(%a : vector<3xf32>, %b : vector<3xf32>, %c : vector<3xf32>) -> ()
 
 // -----
 
+//===----------------------------------------------------------------------===//
+// spirv.CL.{f|s_|u_}clamp
+//===----------------------------------------------------------------------===//
+
+func.func @fclamp(%x : f32, %min : f32, %max : f32) -> () {
+  // CHECK: spirv.CL.fclamp {{%[^,]*}}, {{%[^,]*}}, {{%[^,]*}} : f32
+  %2 = spirv.CL.fclamp %x, %min, %max : f32
+  return
+}
+
+// -----
+
+func.func @fclamp(%x : vector<3xf32>, %min : vector<3xf32>, %max : vector<3xf32>) -> () {
+  // CHECK: spirv.CL.fclamp {{%[^,]*}}, {{%[^,]*}}, {{%[^,]*}} : vector<3xf32>
+  %2 = spirv.CL.fclamp %x, %min, %max : vector<3xf32>
+  return
+}
+
+// -----
+
+func.func @sclamp(%x : i32, %min : i32, %max : i32) -> () {
+  // CHECK: spirv.CL.s_clamp {{%[^,]*}}, {{%[^,]*}}, {{%[^,]*}} : i32
+  %2 = spirv.CL.s_clamp %x, %min, %max : i32
+  return
+}
+
+// -----
+
+func.func @sclamp(%x : vector<3xi16>, %min : vector<3xi16>, %max : vector<3xi16>) -> () {
+  // CHECK: spirv.CL.s_clamp {{%[^,]*}}, {{%[^,]*}}, {{%[^,]*}} : vector<3xi16>
+  %2 = spirv.CL.s_clamp %x, %min, %max : vector<3xi16>
+  return
+}
+
+// -----
+
+func.func @uclamp(%x : i32, %min : i32, %max : i32) -> () {
+  // CHECK: spirv.CL.u_clamp {{%[^,]*}}, {{%[^,]*}}, {{%[^,]*}} : i32
+  %2 = spirv.CL.u_clamp %x, %min, %max : i32
+  return
+}
+
+// -----
+
+func.func @uclamp(%x : vector<3xi16>, %min : vector<3xi16>, %max : vector<3xi16>) -> () {
+  // CHECK: spirv.CL.u_clamp {{%[^,]*}}, {{%[^,]*}}, {{%[^,]*}} : vector<3xi16>
+  %2 = spirv.CL.u_clamp %x, %min, %max : vector<3xi16>
+  return
+}
+
+// -----
+
 //===----------------------------------------------------------------------===//
 // spirv.CL.{F|S|U}{Max|Min}
 //===----------------------------------------------------------------------===//
diff --git a/mlir/test/Target/SPIRV/ocl-ops.mlir b/mlir/test/Target/SPIRV/ocl-ops.mlir
index 3359dfd4f0428..b94c8ab1e8ee0 100644
--- a/mlir/test/Target/SPIRV/ocl-ops.mlir
+++ b/mlir/test/Target/SPIRV/ocl-ops.mlir
@@ -114,4 +114,14 @@ spirv.module Physical64 OpenCL requires #spirv.vce<v1.0, [Kernel, Addresses, Vec
     %6 = spirv.CL.u_min %arg2, %arg3 : i32
     spirv.Return
   }
+
+  spirv.func @clamp(%arg0 : f32, %arg1 : i32, %arg2 : i32) "None" {
+    // CHECK: {{%.*}} = spirv.CL.fclamp {{%[^,]*}}, {{%[^,]*}}, {{%[^,]*}} : f32
+    %0 = spirv.CL.fclamp %arg0, %arg0, %arg0 : f32
+    // CHECK: {{%.*}} = spirv.CL.s_clamp {{%[^,]*}}, {{%[^,]*}}, {{%[^,]*}} : i32
+    %1 = spirv.CL.s_clamp %arg1, %arg2, %arg2 : i32
+    // CHECK: {{%.*}} = spirv.CL.u_clamp {{%[^,]*}}, {{%[^,]*}}, {{%[^,]*}} : i32
+    %2 = spirv.CL.u_clamp %arg1, %arg2, %arg2 : i32
+    spirv.Return
+  }
 }

``````````

</details>


https://github.com/llvm/llvm-project/pull/213594