[Mlir-commits] [mlir] [mlir][mem2reg] Promote whole-buffer memref to a vector SSA value (PR #211880)

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Sun Aug 2 19:45:01 PDT 2026


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``````````bash
git-clang-format --diff origin/main HEAD --extensions cpp,h -- mlir/include/mlir/Dialect/Vector/Transforms/MemorySlotOpInterfaceImpl.h mlir/lib/Dialect/Vector/Transforms/MemorySlotOpInterfaceImpl.cpp mlir/lib/Dialect/MemRef/IR/MemRefMemorySlot.cpp mlir/lib/RegisterAllDialects.cpp --diff_from_common_commit
``````````

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in a stack if you are using a stacked PR workflow. You can limit the results by
changing `origin/main` to the base branch/commit you want to compare against.
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View the diff from clang-format here.
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``````````diff
diff --git a/mlir/lib/Dialect/Vector/Transforms/MemorySlotOpInterfaceImpl.cpp b/mlir/lib/Dialect/Vector/Transforms/MemorySlotOpInterfaceImpl.cpp
index 757a3b14d..db99de4c9 100644
--- a/mlir/lib/Dialect/Vector/Transforms/MemorySlotOpInterfaceImpl.cpp
+++ b/mlir/lib/Dialect/Vector/Transforms/MemorySlotOpInterfaceImpl.cpp
@@ -19,10 +19,10 @@
 //   * a static, same-rank `memref.subview` is exposed as a promotable sub-slice
 //     alias of the buffer's slot (via `PromotableAliaserInterface`): a read of
 //     the subview projects out of the vector value with
-//     `vector.extract_strided_slice`, and a write into it composes back into the
-//     value with `vector.insert_strided_slice`. This lets a buffer that is only
-//     ever accessed through static subviews promote as well, with partial and
-//     overlapping sub-writes composing in program order.
+//     `vector.extract_strided_slice`, and a write into it composes back into
+//     the value with `vector.insert_strided_slice`. This lets a buffer that is
+//     only ever accessed through static subviews promote as well, with partial
+//     and overlapping sub-writes composing in program order.
 //
 // Accesses that are not whole-(sub-)buffer -- dynamic offsets, rank-reducing or
 // non-unit-stride subviews, masked or partial transfers, non-zero transfer
@@ -256,7 +256,8 @@ struct SubViewOpAliasModel
                                      OpOperand & /*aliasedSlotPointerOperand*/,
                                      const MemorySlot & /*parentSlot*/,
                                      const MemorySlot &aliasSlot,
-                                     Value slotValue, OpBuilder &builder) const {
+                                     Value slotValue,
+                                     OpBuilder &builder) const {
     auto subView = cast<memref::SubViewOp>(op);
     SmallVector<int64_t> offsets = *getPromotableSubViewOffsets(subView);
     auto aliasVecType = cast<VectorType>(aliasSlot.elemType);
@@ -276,9 +277,8 @@ struct SubViewOpAliasModel
     auto subView = cast<memref::SubViewOp>(op);
     SmallVector<int64_t> offsets = *getPromotableSubViewOffsets(subView);
     SmallVector<int64_t> strides(offsets.size(), 1);
-    return vector::InsertStridedSliceOp::create(builder, op->getLoc(),
-                                                aliasValue, reachingDef, offsets,
-                                                strides)
+    return vector::InsertStridedSliceOp::create(
+               builder, op->getLoc(), aliasValue, reachingDef, offsets, strides)
         .getResult();
   }
 };

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https://github.com/llvm/llvm-project/pull/211880


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