[Mlir-commits] [mlir] [MLIR][vector] vector.deinterleave to vector.shuffle decomposition (PR #177897)
Noah Prisament
llvmlistbot at llvm.org
Thu Apr 30 19:43:55 PDT 2026
https://github.com/nprisament updated https://github.com/llvm/llvm-project/pull/177897
>From 463ede338c8182e32b732ea49b366b17f1ecb425 Mon Sep 17 00:00:00 2001
From: Noah Prisament <nprisament at gmail.com>
Date: Sat, 24 Jan 2026 22:59:51 -0500
Subject: [PATCH 1/9] Adds a vector.deinterleave to vector.shuffle
decomposition pattern and transform dialect op
---
.../Vector/TransformOps/VectorTransformOps.td | 14 ++++++
.../Vector/Transforms/LoweringPatterns.h | 3 ++
.../TransformOps/VectorTransformOps.cpp | 5 ++
.../Transforms/LowerVectorInterleave.cpp | 46 +++++++++++++++++++
.../vector-deinterleave-to-shuffle.mlir | 21 +++++++++
5 files changed, 89 insertions(+)
create mode 100644 mlir/test/Dialect/Vector/vector-deinterleave-to-shuffle.mlir
diff --git a/mlir/include/mlir/Dialect/Vector/TransformOps/VectorTransformOps.td b/mlir/include/mlir/Dialect/Vector/TransformOps/VectorTransformOps.td
index dcd5f6ff3ad74..04ba31749cbfb 100644
--- a/mlir/include/mlir/Dialect/Vector/TransformOps/VectorTransformOps.td
+++ b/mlir/include/mlir/Dialect/Vector/TransformOps/VectorTransformOps.td
@@ -432,6 +432,20 @@ def ApplyInterleaveToShufflePatternsOp : Op<Transform_Dialect,
let assemblyFormat = "attr-dict";
}
+def ApplyDeinterleaveToShufflePatternsOp : Op<Transform_Dialect,
+ "apply_patterns.vector.deinterleave_to_shuffle",
+ [DeclareOpInterfaceMethods<PatternDescriptorOpInterface>]> {
+ let description = [{
+ Indicates that 1D vector deinterleave operations should be rewritten as
+ vector shuffle operations.
+
+ This is motivated by some current codegen backends not handling vector
+ deinterleave operations.
+ }];
+
+ let assemblyFormat = "attr-dict";
+}
+
def ApplyRewriteNarrowTypePatternsOp : Op<Transform_Dialect,
"apply_patterns.vector.rewrite_narrow_types",
[DeclareOpInterfaceMethods<PatternDescriptorOpInterface>]> {
diff --git a/mlir/include/mlir/Dialect/Vector/Transforms/LoweringPatterns.h b/mlir/include/mlir/Dialect/Vector/Transforms/LoweringPatterns.h
index aa75eff409ef9..d23a4d5c3f5fb 100644
--- a/mlir/include/mlir/Dialect/Vector/Transforms/LoweringPatterns.h
+++ b/mlir/include/mlir/Dialect/Vector/Transforms/LoweringPatterns.h
@@ -290,6 +290,9 @@ void populateVectorInterleaveLoweringPatterns(RewritePatternSet &patterns,
void populateVectorInterleaveToShufflePatterns(RewritePatternSet &patterns,
PatternBenefit benefit = 1);
+void populateVectorDeinterleaveToShufflePatterns(RewritePatternSet &patterns,
+ PatternBenefit benefit = 1);
+
/// Populates the pattern set with the following patterns:
///
/// [UnrollBitCastOp]
diff --git a/mlir/lib/Dialect/Vector/TransformOps/VectorTransformOps.cpp b/mlir/lib/Dialect/Vector/TransformOps/VectorTransformOps.cpp
index 312bd28ad48cf..44f3ad5848dd7 100644
--- a/mlir/lib/Dialect/Vector/TransformOps/VectorTransformOps.cpp
+++ b/mlir/lib/Dialect/Vector/TransformOps/VectorTransformOps.cpp
@@ -212,6 +212,11 @@ void transform::ApplyInterleaveToShufflePatternsOp::populatePatterns(
vector::populateVectorInterleaveToShufflePatterns(patterns);
}
+void transform::ApplyDeinterleaveToShufflePatternsOp::populatePatterns(
+ RewritePatternSet &patterns) {
+ vector::populateVectorDeinterleaveToShufflePatterns(patterns);
+}
+
void transform::ApplyRewriteNarrowTypePatternsOp::populatePatterns(
RewritePatternSet &patterns) {
populateVectorNarrowTypeRewritePatterns(patterns);
diff --git a/mlir/lib/Dialect/Vector/Transforms/LowerVectorInterleave.cpp b/mlir/lib/Dialect/Vector/Transforms/LowerVectorInterleave.cpp
index 13ad98de284e2..f72e35f3daeae 100644
--- a/mlir/lib/Dialect/Vector/Transforms/LowerVectorInterleave.cpp
+++ b/mlir/lib/Dialect/Vector/Transforms/LowerVectorInterleave.cpp
@@ -148,6 +148,7 @@ class UnrollDeinterleaveOp final
private:
int64_t targetRank = 1;
};
+
/// Rewrite vector.interleave op into an equivalent vector.shuffle op, when
/// applicable: `sourceType` must be 1D and non-scalable.
///
@@ -181,6 +182,46 @@ struct InterleaveToShuffle final : OpRewritePattern<vector::InterleaveOp> {
}
};
+/// Rewrite vector.deinterleave op into two equivalent vector.shuffle ops, when
+/// applicable: `sourceType` must be 1D and non-scalable.
+///
+/// Example:
+///
+/// ```mlir
+/// %evens, %odds = vector.deinterleave %arg0 : vector<4xi32> -> vector<2xi32>
+/// ```
+///
+/// Is rewritten into:
+///
+/// ```mlir
+/// %evens = vector.shuffle %arg0, %arg0 [0, 2] : vector<4xi32>, vector<4xi32>
+/// %odds = vector.shuffle %arg0, %arg0 [1, 3] : vector<4xi32>, vector<4xi32>
+/// ```
+struct DeinterleaveToShuffle final : OpRewritePattern<vector::DeinterleaveOp> {
+ using Base::Base;
+
+ LogicalResult matchAndRewrite(vector::DeinterleaveOp op,
+ PatternRewriter &rewriter) const override {
+ VectorType sourceType = op.getSourceVectorType();
+ if (sourceType.getRank() != 1 || sourceType.isScalable()) {
+ return failure();
+ }
+
+ auto seq = llvm::seq<int64_t>(sourceType.getNumElements() / 2);
+ auto evenZip = llvm::map_to_vector(seq, [](int64_t i) { return i * 2; });
+ auto oddZip =
+ llvm::map_to_vector(evenZip, [](int64_t i) { return i + 1; });
+
+ Value evenResult = vector::ShuffleOp::create(
+ rewriter, op.getLoc(), op.getOperand(), op.getOperand(), evenZip);
+ Value oddResult = vector::ShuffleOp::create(
+ rewriter, op.getLoc(), op.getOperand(), op.getOperand(), oddZip);
+
+ rewriter.replaceOp(op, ValueRange{evenResult, oddResult});
+ return success();
+ }
+};
+
} // namespace
void mlir::vector::populateVectorInterleaveLoweringPatterns(
@@ -193,3 +234,8 @@ void mlir::vector::populateVectorInterleaveToShufflePatterns(
RewritePatternSet &patterns, PatternBenefit benefit) {
patterns.add<InterleaveToShuffle>(patterns.getContext(), benefit);
}
+
+void mlir::vector::populateVectorDeinterleaveToShufflePatterns(
+ RewritePatternSet &patterns, PatternBenefit benefit) {
+ patterns.add<DeinterleaveToShuffle>(patterns.getContext(), benefit);
+}
diff --git a/mlir/test/Dialect/Vector/vector-deinterleave-to-shuffle.mlir b/mlir/test/Dialect/Vector/vector-deinterleave-to-shuffle.mlir
new file mode 100644
index 0000000000000..d238a8fe28ae4
--- /dev/null
+++ b/mlir/test/Dialect/Vector/vector-deinterleave-to-shuffle.mlir
@@ -0,0 +1,21 @@
+// RUN: mlir-opt %s --transform-interpreter | FileCheck %s
+
+// CHECK-LABEL: @vector_deinterleave_to_shuffle
+func.func @vector_deinterleave_to_shuffle(%arg0: vector<14xi16>) -> (vector<7xi16>, vector<7xi16>) {
+ %evens, %odds = vector.deinterleave %arg0 : vector<14xi16> -> vector<7xi16>
+ return %evens, %odds : vector<7xi16>, vector<7xi16>
+}
+// CHECK: vector.shuffle %arg0, %arg0 [0, 2, 4, 6, 8, 10, 12] : vector<14xi16>, vector<14xi16>
+// CHECK: vector.shuffle %arg0, %arg0 [1, 3, 5, 7, 9, 11, 13] : vector<14xi16>, vector<14xi16>
+
+module attributes {transform.with_named_sequence} {
+ transform.named_sequence @__transform_main(%module_op: !transform.any_op {transform.readonly}) {
+ %f = transform.structured.match ops{["func.func"]} in %module_op
+ : (!transform.any_op) -> !transform.any_op
+
+ transform.apply_patterns to %f {
+ transform.apply_patterns.vector.deinterleave_to_shuffle
+ } : !transform.any_op
+ transform.yield
+ }
+}
>From 480aca3941fbb007b32745462760c4ca1e0f4e12 Mon Sep 17 00:00:00 2001
From: Noah Prisament <nprisament at gmail.com>
Date: Sat, 25 Apr 2026 14:52:36 -0400
Subject: [PATCH 2/9] merge interleave and deinterleave to shuffle transform
ops and lit test
---
.../Vector/TransformOps/VectorTransformOps.td | 24 ++++---------------
.../TransformOps/VectorTransformOps.cpp | 6 +----
.../vector-deinterleave-to-shuffle.mlir | 21 ----------------
.../Vector/vector-interleave-to-shuffle.mlir | 10 +++++++-
4 files changed, 15 insertions(+), 46 deletions(-)
delete mode 100644 mlir/test/Dialect/Vector/vector-deinterleave-to-shuffle.mlir
diff --git a/mlir/include/mlir/Dialect/Vector/TransformOps/VectorTransformOps.td b/mlir/include/mlir/Dialect/Vector/TransformOps/VectorTransformOps.td
index 04ba31749cbfb..333570d2348ce 100644
--- a/mlir/include/mlir/Dialect/Vector/TransformOps/VectorTransformOps.td
+++ b/mlir/include/mlir/Dialect/Vector/TransformOps/VectorTransformOps.td
@@ -418,29 +418,15 @@ def ApplyLowerInterleavePatternsOp : Op<Transform_Dialect,
let assemblyFormat = "attr-dict";
}
-def ApplyInterleaveToShufflePatternsOp : Op<Transform_Dialect,
- "apply_patterns.vector.interleave_to_shuffle",
+def ApplyInterleaveAndDeinterleaveToShufflePatternsOp : Op<Transform_Dialect,
+ "apply_patterns.vector.interleave_and_deinterleave_to_shuffle",
[DeclareOpInterfaceMethods<PatternDescriptorOpInterface>]> {
let description = [{
- Indicates that 1D vector interleave operations should be rewritten as
- vector shuffle operations.
+ Indicates that 1D vector interleave and deinterleave operations should be
+ rewritten as vector shuffle operations.
This is motivated by some current codegen backends not handling vector
- interleave operations.
- }];
-
- let assemblyFormat = "attr-dict";
-}
-
-def ApplyDeinterleaveToShufflePatternsOp : Op<Transform_Dialect,
- "apply_patterns.vector.deinterleave_to_shuffle",
- [DeclareOpInterfaceMethods<PatternDescriptorOpInterface>]> {
- let description = [{
- Indicates that 1D vector deinterleave operations should be rewritten as
- vector shuffle operations.
-
- This is motivated by some current codegen backends not handling vector
- deinterleave operations.
+ interleave and deinterleave operations.
}];
let assemblyFormat = "attr-dict";
diff --git a/mlir/lib/Dialect/Vector/TransformOps/VectorTransformOps.cpp b/mlir/lib/Dialect/Vector/TransformOps/VectorTransformOps.cpp
index 44f3ad5848dd7..35a0e078c5ad2 100644
--- a/mlir/lib/Dialect/Vector/TransformOps/VectorTransformOps.cpp
+++ b/mlir/lib/Dialect/Vector/TransformOps/VectorTransformOps.cpp
@@ -207,13 +207,9 @@ void transform::ApplyLowerInterleavePatternsOp::populatePatterns(
vector::populateVectorInterleaveLoweringPatterns(patterns);
}
-void transform::ApplyInterleaveToShufflePatternsOp::populatePatterns(
+void transform::ApplyInterleaveAndDeinterleaveToShufflePatternsOp::populatePatterns(
RewritePatternSet &patterns) {
vector::populateVectorInterleaveToShufflePatterns(patterns);
-}
-
-void transform::ApplyDeinterleaveToShufflePatternsOp::populatePatterns(
- RewritePatternSet &patterns) {
vector::populateVectorDeinterleaveToShufflePatterns(patterns);
}
diff --git a/mlir/test/Dialect/Vector/vector-deinterleave-to-shuffle.mlir b/mlir/test/Dialect/Vector/vector-deinterleave-to-shuffle.mlir
deleted file mode 100644
index d238a8fe28ae4..0000000000000
--- a/mlir/test/Dialect/Vector/vector-deinterleave-to-shuffle.mlir
+++ /dev/null
@@ -1,21 +0,0 @@
-// RUN: mlir-opt %s --transform-interpreter | FileCheck %s
-
-// CHECK-LABEL: @vector_deinterleave_to_shuffle
-func.func @vector_deinterleave_to_shuffle(%arg0: vector<14xi16>) -> (vector<7xi16>, vector<7xi16>) {
- %evens, %odds = vector.deinterleave %arg0 : vector<14xi16> -> vector<7xi16>
- return %evens, %odds : vector<7xi16>, vector<7xi16>
-}
-// CHECK: vector.shuffle %arg0, %arg0 [0, 2, 4, 6, 8, 10, 12] : vector<14xi16>, vector<14xi16>
-// CHECK: vector.shuffle %arg0, %arg0 [1, 3, 5, 7, 9, 11, 13] : vector<14xi16>, vector<14xi16>
-
-module attributes {transform.with_named_sequence} {
- transform.named_sequence @__transform_main(%module_op: !transform.any_op {transform.readonly}) {
- %f = transform.structured.match ops{["func.func"]} in %module_op
- : (!transform.any_op) -> !transform.any_op
-
- transform.apply_patterns to %f {
- transform.apply_patterns.vector.deinterleave_to_shuffle
- } : !transform.any_op
- transform.yield
- }
-}
diff --git a/mlir/test/Dialect/Vector/vector-interleave-to-shuffle.mlir b/mlir/test/Dialect/Vector/vector-interleave-to-shuffle.mlir
index d59cd4e6765ba..f2254206f16ef 100644
--- a/mlir/test/Dialect/Vector/vector-interleave-to-shuffle.mlir
+++ b/mlir/test/Dialect/Vector/vector-interleave-to-shuffle.mlir
@@ -7,13 +7,21 @@ func.func @vector_interleave_to_shuffle(%a: vector<7xi16>, %b: vector<7xi16>) ->
}
// CHECK: vector.shuffle %arg0, %arg1 [0, 7, 1, 8, 2, 9, 3, 10, 4, 11, 5, 12, 6, 13] : vector<7xi16>, vector<7xi16>
+// CHECK-LABEL: @vector_deinterleave_to_shuffle
+func.func @vector_deinterleave_to_shuffle(%arg0: vector<14xi16>) -> (vector<7xi16>, vector<7xi16>) {
+ %evens, %odds = vector.deinterleave %arg0 : vector<14xi16> -> vector<7xi16>
+ return %evens, %odds : vector<7xi16>, vector<7xi16>
+}
+// CHECK: vector.shuffle %arg0, %arg0 [0, 2, 4, 6, 8, 10, 12] : vector<14xi16>, vector<14xi16>
+// CHECK: vector.shuffle %arg0, %arg0 [1, 3, 5, 7, 9, 11, 13] : vector<14xi16>, vector<14xi16>
+
module attributes {transform.with_named_sequence} {
transform.named_sequence @__transform_main(%module_op: !transform.any_op {transform.readonly}) {
%f = transform.structured.match ops{["func.func"]} in %module_op
: (!transform.any_op) -> !transform.any_op
transform.apply_patterns to %f {
- transform.apply_patterns.vector.interleave_to_shuffle
+ transform.apply_patterns.vector.interleave_and_deinterleave_to_shuffle
} : !transform.any_op
transform.yield
}
>From d430763c7c96200f9e0280a57f0456c116d072fd Mon Sep 17 00:00:00 2001
From: Noah Prisament <nprisament at gmail.com>
Date: Sun, 26 Apr 2026 13:26:40 -0400
Subject: [PATCH 3/9] enhanced vector interleave pattern to handle 0D (which
will not be unrolled), added edge case and negative tests, and clang format
---
.../TransformOps/VectorTransformOps.cpp | 4 +--
.../Transforms/LowerVectorInterleave.cpp | 9 +++---
.../Vector/vector-interleave-to-shuffle.mlir | 32 +++++++++++++++++++
3 files changed, 38 insertions(+), 7 deletions(-)
diff --git a/mlir/lib/Dialect/Vector/TransformOps/VectorTransformOps.cpp b/mlir/lib/Dialect/Vector/TransformOps/VectorTransformOps.cpp
index 35a0e078c5ad2..8892a8e03ec8e 100644
--- a/mlir/lib/Dialect/Vector/TransformOps/VectorTransformOps.cpp
+++ b/mlir/lib/Dialect/Vector/TransformOps/VectorTransformOps.cpp
@@ -207,8 +207,8 @@ void transform::ApplyLowerInterleavePatternsOp::populatePatterns(
vector::populateVectorInterleaveLoweringPatterns(patterns);
}
-void transform::ApplyInterleaveAndDeinterleaveToShufflePatternsOp::populatePatterns(
- RewritePatternSet &patterns) {
+void transform::ApplyInterleaveAndDeinterleaveToShufflePatternsOp::
+ populatePatterns(RewritePatternSet &patterns) {
vector::populateVectorInterleaveToShufflePatterns(patterns);
vector::populateVectorDeinterleaveToShufflePatterns(patterns);
}
diff --git a/mlir/lib/Dialect/Vector/Transforms/LowerVectorInterleave.cpp b/mlir/lib/Dialect/Vector/Transforms/LowerVectorInterleave.cpp
index f72e35f3daeae..4667d1b1124cc 100644
--- a/mlir/lib/Dialect/Vector/Transforms/LowerVectorInterleave.cpp
+++ b/mlir/lib/Dialect/Vector/Transforms/LowerVectorInterleave.cpp
@@ -116,7 +116,7 @@ class UnrollDeinterleaveOp final
public:
UnrollDeinterleaveOp(int64_t targetRank, MLIRContext *context,
PatternBenefit benefit = 1)
- : OpRewritePattern(context, benefit), targetRank(targetRank) {};
+ : OpRewritePattern(context, benefit), targetRank(targetRank){};
LogicalResult matchAndRewrite(vector::DeinterleaveOp op,
PatternRewriter &rewriter) const override {
@@ -150,7 +150,7 @@ class UnrollDeinterleaveOp final
};
/// Rewrite vector.interleave op into an equivalent vector.shuffle op, when
-/// applicable: `sourceType` must be 1D and non-scalable.
+/// applicable: `sourceType` must be 0D or 1D, and non-scalable.
///
/// Example:
///
@@ -170,7 +170,7 @@ struct InterleaveToShuffle final : OpRewritePattern<vector::InterleaveOp> {
LogicalResult matchAndRewrite(vector::InterleaveOp op,
PatternRewriter &rewriter) const override {
VectorType sourceType = op.getSourceVectorType();
- if (sourceType.getRank() != 1 || sourceType.isScalable()) {
+ if (sourceType.getRank() > 1 || sourceType.isScalable()) {
return failure();
}
int64_t n = sourceType.getNumElements();
@@ -209,8 +209,7 @@ struct DeinterleaveToShuffle final : OpRewritePattern<vector::DeinterleaveOp> {
auto seq = llvm::seq<int64_t>(sourceType.getNumElements() / 2);
auto evenZip = llvm::map_to_vector(seq, [](int64_t i) { return i * 2; });
- auto oddZip =
- llvm::map_to_vector(evenZip, [](int64_t i) { return i + 1; });
+ auto oddZip = llvm::map_to_vector(evenZip, [](int64_t i) { return i + 1; });
Value evenResult = vector::ShuffleOp::create(
rewriter, op.getLoc(), op.getOperand(), op.getOperand(), evenZip);
diff --git a/mlir/test/Dialect/Vector/vector-interleave-to-shuffle.mlir b/mlir/test/Dialect/Vector/vector-interleave-to-shuffle.mlir
index f2254206f16ef..7dc0f17661a54 100644
--- a/mlir/test/Dialect/Vector/vector-interleave-to-shuffle.mlir
+++ b/mlir/test/Dialect/Vector/vector-interleave-to-shuffle.mlir
@@ -7,6 +7,13 @@ func.func @vector_interleave_to_shuffle(%a: vector<7xi16>, %b: vector<7xi16>) ->
}
// CHECK: vector.shuffle %arg0, %arg1 [0, 7, 1, 8, 2, 9, 3, 10, 4, 11, 5, 12, 6, 13] : vector<7xi16>, vector<7xi16>
+// CHECK-LABEL: @vector_interleave_0d
+func.func @vector_interleave_0d(%a: vector<f32>, %b: vector<f32>) -> vector<2xf32> {
+ %0 = vector.interleave %a, %b : vector<f32> -> vector<2xf32>
+ return %0 : vector<2xf32>
+}
+// CHECK: vector.shuffle %arg0, %arg1 [0, 1] : vector<f32>, vector<f32>
+
// CHECK-LABEL: @vector_deinterleave_to_shuffle
func.func @vector_deinterleave_to_shuffle(%arg0: vector<14xi16>) -> (vector<7xi16>, vector<7xi16>) {
%evens, %odds = vector.deinterleave %arg0 : vector<14xi16> -> vector<7xi16>
@@ -15,6 +22,31 @@ func.func @vector_deinterleave_to_shuffle(%arg0: vector<14xi16>) -> (vector<7xi1
// CHECK: vector.shuffle %arg0, %arg0 [0, 2, 4, 6, 8, 10, 12] : vector<14xi16>, vector<14xi16>
// CHECK: vector.shuffle %arg0, %arg0 [1, 3, 5, 7, 9, 11, 13] : vector<14xi16>, vector<14xi16>
+// CHECK-LABEL: @vector_deinterleave_size2
+func.func @vector_deinterleave_size2(%arg0: vector<2xi32>) -> (vector<1xi32>, vector<1xi32>) {
+ %evens, %odds = vector.deinterleave %arg0 : vector<2xi32> -> vector<1xi32>
+ return %evens, %odds : vector<1xi32>, vector<1xi32>
+}
+// CHECK: vector.shuffle %arg0, %arg0 [0] : vector<2xi32>, vector<2xi32>
+// CHECK: vector.shuffle %arg0, %arg0 [1] : vector<2xi32>, vector<2xi32>
+
+// CHECK-LABEL: @negative_cases
+func.func @negative_cases(
+ %a: vector<[4]xi32>, %b: vector<[4]xi32>,
+ %c: vector<2x4xi32>, %d: vector<2x4xi32>,
+ %e: vector<[8]xi32>,
+ %f: vector<2x8xi32>) -> (vector<[8]xi32>, vector<2x8xi32>,
+ vector<[4]xi32>, vector<[4]xi32>,
+ vector<2x4xi32>, vector<2x4xi32>) {
+ // CHECK-NOT: vector.shuffle
+ %0 = vector.interleave %a, %b : vector<[4]xi32> -> vector<[8]xi32>
+ %1 = vector.interleave %c, %d : vector<2x4xi32> -> vector<2x8xi32>
+ %evens0, %odds0 = vector.deinterleave %e : vector<[8]xi32> -> vector<[4]xi32>
+ %evens1, %odds1 = vector.deinterleave %f : vector<2x8xi32> -> vector<2x4xi32>
+ return %0, %1, %evens0, %odds0, %evens1, %odds1
+ : vector<[8]xi32>, vector<2x8xi32>, vector<[4]xi32>, vector<[4]xi32>, vector<2x4xi32>, vector<2x4xi32>
+}
+
module attributes {transform.with_named_sequence} {
transform.named_sequence @__transform_main(%module_op: !transform.any_op {transform.readonly}) {
%f = transform.structured.match ops{["func.func"]} in %module_op
>From 46238b60dd3e5117f7e0f9727a715f23ecef5eab Mon Sep 17 00:00:00 2001
From: Noah Prisament <nprisament at gmail.com>
Date: Sun, 26 Apr 2026 14:20:17 -0400
Subject: [PATCH 4/9] fix clang-format issues
---
mlir/lib/Dialect/Vector/Transforms/LowerVectorInterleave.cpp | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/mlir/lib/Dialect/Vector/Transforms/LowerVectorInterleave.cpp b/mlir/lib/Dialect/Vector/Transforms/LowerVectorInterleave.cpp
index 4667d1b1124cc..8f81dbb636325 100644
--- a/mlir/lib/Dialect/Vector/Transforms/LowerVectorInterleave.cpp
+++ b/mlir/lib/Dialect/Vector/Transforms/LowerVectorInterleave.cpp
@@ -51,7 +51,7 @@ class UnrollInterleaveOp final : public OpRewritePattern<vector::InterleaveOp> {
public:
UnrollInterleaveOp(int64_t targetRank, MLIRContext *context,
PatternBenefit benefit = 1)
- : OpRewritePattern(context, benefit), targetRank(targetRank){};
+ : OpRewritePattern(context, benefit), targetRank(targetRank) {};
LogicalResult matchAndRewrite(vector::InterleaveOp op,
PatternRewriter &rewriter) const override {
@@ -116,7 +116,7 @@ class UnrollDeinterleaveOp final
public:
UnrollDeinterleaveOp(int64_t targetRank, MLIRContext *context,
PatternBenefit benefit = 1)
- : OpRewritePattern(context, benefit), targetRank(targetRank){};
+ : OpRewritePattern(context, benefit), targetRank(targetRank) {};
LogicalResult matchAndRewrite(vector::DeinterleaveOp op,
PatternRewriter &rewriter) const override {
>From 9964ea3036bfef6c904e70c8576c0449c5b4504f Mon Sep 17 00:00:00 2001
From: Noah Prisament <nprisament at gmail.com>
Date: Thu, 30 Apr 2026 22:31:51 -0400
Subject: [PATCH 5/9] Update vector_deinterleave_to_shuffle_1d name
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Co-authored-by: Andrzej Warzyński <andrzej.warzynski at gmail.com>
---
mlir/test/Dialect/Vector/vector-interleave-to-shuffle.mlir | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/mlir/test/Dialect/Vector/vector-interleave-to-shuffle.mlir b/mlir/test/Dialect/Vector/vector-interleave-to-shuffle.mlir
index 7dc0f17661a54..018432e7d903f 100644
--- a/mlir/test/Dialect/Vector/vector-interleave-to-shuffle.mlir
+++ b/mlir/test/Dialect/Vector/vector-interleave-to-shuffle.mlir
@@ -15,7 +15,7 @@ func.func @vector_interleave_0d(%a: vector<f32>, %b: vector<f32>) -> vector<2xf3
// CHECK: vector.shuffle %arg0, %arg1 [0, 1] : vector<f32>, vector<f32>
// CHECK-LABEL: @vector_deinterleave_to_shuffle
-func.func @vector_deinterleave_to_shuffle(%arg0: vector<14xi16>) -> (vector<7xi16>, vector<7xi16>) {
+func.func @vector_deinterleave_to_shuffle_1d(%arg0: vector<14xi16>) -> (vector<7xi16>, vector<7xi16>) {
%evens, %odds = vector.deinterleave %arg0 : vector<14xi16> -> vector<7xi16>
return %evens, %odds : vector<7xi16>, vector<7xi16>
}
>From 99b22c5fc85abb39f3e395e78b83ed7113b90de2 Mon Sep 17 00:00:00 2001
From: Noah Prisament <nprisament at gmail.com>
Date: Thu, 30 Apr 2026 22:32:24 -0400
Subject: [PATCH 6/9] Update vector_interleave_to_shuffle_0d name
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Co-authored-by: Andrzej Warzyński <andrzej.warzynski at gmail.com>
---
mlir/test/Dialect/Vector/vector-interleave-to-shuffle.mlir | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/mlir/test/Dialect/Vector/vector-interleave-to-shuffle.mlir b/mlir/test/Dialect/Vector/vector-interleave-to-shuffle.mlir
index 018432e7d903f..55bba58f694c5 100644
--- a/mlir/test/Dialect/Vector/vector-interleave-to-shuffle.mlir
+++ b/mlir/test/Dialect/Vector/vector-interleave-to-shuffle.mlir
@@ -8,7 +8,7 @@ func.func @vector_interleave_to_shuffle(%a: vector<7xi16>, %b: vector<7xi16>) ->
// CHECK: vector.shuffle %arg0, %arg1 [0, 7, 1, 8, 2, 9, 3, 10, 4, 11, 5, 12, 6, 13] : vector<7xi16>, vector<7xi16>
// CHECK-LABEL: @vector_interleave_0d
-func.func @vector_interleave_0d(%a: vector<f32>, %b: vector<f32>) -> vector<2xf32> {
+func.func @vector_interleave_to_shuffle_0d(%a: vector<f32>, %b: vector<f32>) -> vector<2xf32> {
%0 = vector.interleave %a, %b : vector<f32> -> vector<2xf32>
return %0 : vector<2xf32>
}
>From 76292332b1229ce331be8781cdba3083b51e8d29 Mon Sep 17 00:00:00 2001
From: Noah Prisament <nprisament at gmail.com>
Date: Thu, 30 Apr 2026 22:33:05 -0400
Subject: [PATCH 7/9] Apply suggestion from @banach-space
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Co-authored-by: Andrzej Warzyński <andrzej.warzynski at gmail.com>
---
mlir/test/Dialect/Vector/vector-interleave-to-shuffle.mlir | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/mlir/test/Dialect/Vector/vector-interleave-to-shuffle.mlir b/mlir/test/Dialect/Vector/vector-interleave-to-shuffle.mlir
index 55bba58f694c5..70a4add67a4d4 100644
--- a/mlir/test/Dialect/Vector/vector-interleave-to-shuffle.mlir
+++ b/mlir/test/Dialect/Vector/vector-interleave-to-shuffle.mlir
@@ -1,7 +1,7 @@
// RUN: mlir-opt %s --transform-interpreter | FileCheck %s
// CHECK-LABEL: @vector_interleave_to_shuffle
-func.func @vector_interleave_to_shuffle(%a: vector<7xi16>, %b: vector<7xi16>) -> vector<14xi16> {
+func.func @vector_interleave_to_shuffle_1d(%a: vector<7xi16>, %b: vector<7xi16>) -> vector<14xi16> {
%0 = vector.interleave %a, %b : vector<7xi16> -> vector<14xi16>
return %0 : vector<14xi16>
}
>From a8e0574ff8f3bdcde3773b9e2d0169770caff241 Mon Sep 17 00:00:00 2001
From: Noah Prisament <nprisament at gmail.com>
Date: Thu, 30 Apr 2026 22:34:40 -0400
Subject: [PATCH 8/9] Rename vector-interleave-to-shuffle.mlir to
vector-interleave-deinterleave-to-shuffle.mlir
---
...huffle.mlir => vector-interleave-deinterleave-to-shuffle.mlir} | 0
1 file changed, 0 insertions(+), 0 deletions(-)
rename mlir/test/Dialect/Vector/{vector-interleave-to-shuffle.mlir => vector-interleave-deinterleave-to-shuffle.mlir} (100%)
diff --git a/mlir/test/Dialect/Vector/vector-interleave-to-shuffle.mlir b/mlir/test/Dialect/Vector/vector-interleave-deinterleave-to-shuffle.mlir
similarity index 100%
rename from mlir/test/Dialect/Vector/vector-interleave-to-shuffle.mlir
rename to mlir/test/Dialect/Vector/vector-interleave-deinterleave-to-shuffle.mlir
>From 782758bd70dc7c3d97a2b61cd69aaa2390e76193 Mon Sep 17 00:00:00 2001
From: Noah Prisament <nprisament at gmail.com>
Date: Thu, 30 Apr 2026 22:43:42 -0400
Subject: [PATCH 9/9] fix check labels
---
.../Vector/vector-interleave-deinterleave-to-shuffle.mlir | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/mlir/test/Dialect/Vector/vector-interleave-deinterleave-to-shuffle.mlir b/mlir/test/Dialect/Vector/vector-interleave-deinterleave-to-shuffle.mlir
index 70a4add67a4d4..13d1af28f9eb8 100644
--- a/mlir/test/Dialect/Vector/vector-interleave-deinterleave-to-shuffle.mlir
+++ b/mlir/test/Dialect/Vector/vector-interleave-deinterleave-to-shuffle.mlir
@@ -1,20 +1,20 @@
// RUN: mlir-opt %s --transform-interpreter | FileCheck %s
-// CHECK-LABEL: @vector_interleave_to_shuffle
+// CHECK-LABEL: @vector_interleave_to_shuffle_1d
func.func @vector_interleave_to_shuffle_1d(%a: vector<7xi16>, %b: vector<7xi16>) -> vector<14xi16> {
%0 = vector.interleave %a, %b : vector<7xi16> -> vector<14xi16>
return %0 : vector<14xi16>
}
// CHECK: vector.shuffle %arg0, %arg1 [0, 7, 1, 8, 2, 9, 3, 10, 4, 11, 5, 12, 6, 13] : vector<7xi16>, vector<7xi16>
-// CHECK-LABEL: @vector_interleave_0d
+// CHECK-LABEL: @vector_interleave_to_shuffle_0d
func.func @vector_interleave_to_shuffle_0d(%a: vector<f32>, %b: vector<f32>) -> vector<2xf32> {
%0 = vector.interleave %a, %b : vector<f32> -> vector<2xf32>
return %0 : vector<2xf32>
}
// CHECK: vector.shuffle %arg0, %arg1 [0, 1] : vector<f32>, vector<f32>
-// CHECK-LABEL: @vector_deinterleave_to_shuffle
+// CHECK-LABEL: @vector_deinterleave_to_shuffle_1d
func.func @vector_deinterleave_to_shuffle_1d(%arg0: vector<14xi16>) -> (vector<7xi16>, vector<7xi16>) {
%evens, %odds = vector.deinterleave %arg0 : vector<14xi16> -> vector<7xi16>
return %evens, %odds : vector<7xi16>, vector<7xi16>
@@ -31,6 +31,7 @@ func.func @vector_deinterleave_size2(%arg0: vector<2xi32>) -> (vector<1xi32>, ve
// CHECK: vector.shuffle %arg0, %arg0 [1] : vector<2xi32>, vector<2xi32>
// CHECK-LABEL: @negative_cases
+// CHECK-NOT: vector.shuffle
func.func @negative_cases(
%a: vector<[4]xi32>, %b: vector<[4]xi32>,
%c: vector<2x4xi32>, %d: vector<2x4xi32>,
@@ -38,7 +39,6 @@ func.func @negative_cases(
%f: vector<2x8xi32>) -> (vector<[8]xi32>, vector<2x8xi32>,
vector<[4]xi32>, vector<[4]xi32>,
vector<2x4xi32>, vector<2x4xi32>) {
- // CHECK-NOT: vector.shuffle
%0 = vector.interleave %a, %b : vector<[4]xi32> -> vector<[8]xi32>
%1 = vector.interleave %c, %d : vector<2x4xi32> -> vector<2x8xi32>
%evens0, %odds0 = vector.deinterleave %e : vector<[8]xi32> -> vector<[4]xi32>
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