[Mlir-commits] [mlir] [mlir][SPIR-V] Lower AND/OR/XOR vector reductions (PR #192293)

[Arseniy Obolenskiy]

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@@ -442,10 +442,17 @@ struct VectorReductionPattern final : OpConversionPattern<vector::ReductionOp> {
         INT_OR_FLOAT_CASE(MAXUI, SPIRVUMaxOp);
         INT_OR_FLOAT_CASE(MAXSI, SPIRVSMaxOp);
 
-      case vector::CombiningKind::AND:
-      case vector::CombiningKind::OR:
-      case vector::CombiningKind::XOR:
-        return rewriter.notifyMatchFailure(reduceOp, "unimplemented");
+#define INT_CASE(kind, iop)                                                    \
+  case vector::CombiningKind::kind:                                            \
+    assert(isa<IntegerType>(resultType));                                      \
+    result = spirv::iop::create(rewriter, loc, resultType, result, next);      \
+    break
+
+        INT_CASE(AND, BitwiseAndOp);
+        INT_CASE(OR, BitwiseOrOp);
+        INT_CASE(XOR, BitwiseXorOp);
+
+#undef INT_CASE
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aobolensk wrote:

Done

https://github.com/llvm/llvm-project/pull/192293