[Mlir-commits] [clang] [llvm] [mlir] [IR][CodeGen] Replace constrained FP intrinsics with fp.control/fp.except operand bundles (PR #191613)
Jason Eckhardt
llvmlistbot at llvm.org
Sun Apr 12 11:57:29 PDT 2026
================
@@ -2225,6 +2200,98 @@ bool IRTranslator::translateKnownIntrinsic(const CallInst &CI, Intrinsic::ID ID,
if (translateSimpleIntrinsic(CI, ID, MIRBuilder))
return true;
+ // Redirect new-form FP intrinsics with non-default bundles to G_STRICT_*.
+ {
+ fp::ExceptionBehavior EB = CI.getExceptionBehavior();
+ RoundingMode RM = CI.getRoundingMode();
+ if (EB != fp::ebStrict || RM != RoundingMode::Dynamic) {
+ if (unsigned StrictOp = getBundledFPStrictGOpcode(ID)) {
+ uint32_t Flags = MachineInstr::copyFlagsFromInstruction(CI);
+ if (EB == fp::ebIgnore)
+ Flags |= MachineInstr::NoFPExcept;
+ SmallVector<SrcOp, 4> VRegs;
+ for (const auto &Arg : CI.args()) {
+ // Skip metadata args (e.g., predicates passed as MetadataAsValue).
+ if (!isa<MetadataAsValue>(Arg.get()))
+ VRegs.push_back(getOrCreateVReg(*Arg.get()));
+ }
+ MIRBuilder.buildInstr(StrictOp, {getOrCreateVReg(CI)}, VRegs, Flags);
+ return true;
+ }
+ }
+ }
----------------
nvjle wrote:
Can we eliminate this scope to reduce the overall nesting depth? Similarly, can we fold the second conditional into the first to reduce nesting?
https://github.com/llvm/llvm-project/pull/191613
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