[Mlir-commits] [mlir] [MLIR][XeVM] Update XeVM type converter (PR #189306)
Sang Ik Lee
llvmlistbot at llvm.org
Thu Apr 9 18:00:09 PDT 2026
================
@@ -1103,17 +1079,15 @@ struct ConvertXeGPUToXeVMPass
if (type.isScattered())
return {};
if (type.getRank() == 1)
- return IntegerType::get(&getContext(), 64);
- auto i32Type = IntegerType::get(&getContext(), 32);
+ return xevmIndexType;
return VectorType::get(8, i32Type);
});
// Convert MemDescType into i32 for SLM
- typeConverter.addConversion([&](xegpu::MemDescType type) -> Type {
- return IntegerType::get(&getContext(), 32);
- });
+ typeConverter.addConversion(
+ [&](xegpu::MemDescType type) -> Type { return i32Type; });
----------------
silee2 wrote:
Unfortunately, XeVM has deal with different Index/Pointer size for different address space.
General pointer/index size can be controlled by index bitwidth option but in case size depends on address space, which is the case for XeVM.
So, address space requiring non-standard size is hard coded for now.
Proper solution is to use DLTI which allows specifying pointer size per address space.
For XeVM, SLM or Workgroup address space requires 32bit pointer for current HW.
MemDescType is an abstraction for SLM memory and that is why it is lowered to a 32bit value for the base address.
Eventually transitioning to using DLTI instead of index bitwidth option, will fix this issue.
https://github.com/llvm/llvm-project/pull/189306
More information about the Mlir-commits
mailing list