[Mlir-commits] [mlir] [MLIR] Add I{8, 16}Enum tablegen classes (PR #190825)

[Robert Konicar]

================
@@ -130,3 +140,13 @@ def MyNonQuotedPrintBitEnum
 // DECL: inline ::llvm::raw_ostream &operator<<(::llvm::raw_ostream &p, ::MyNonQuotedPrintBitEnum value) {
 // DECL:   auto valueStr = stringifyEnum(value);
 // DECL-NEXT:   return p << valueStr;
+
+def MyI8Enum : I8Enum<"MyI8Enum", "Example I8 enum", [
+    I8EnumCase<"a", 254>,
+    I8EnumCase<"b", 255>
+  ]>;
+
+def MyI16Enum : I16Enum<"MyI16Enum", "Example I16 enum", [
+    I8EnumCase<"a", 65534>,
+    I8EnumCase<"b", 65535>
----------------
Jezurko wrote:

I have not investigated deeply but it almost seems that the `EnumCase` bitwidth is not used anywhere? At least it is not stored/accessed through the `mlir::tblgen::EnumCase` class iiuic

https://github.com/llvm/llvm-project/pull/190825