[Mlir-commits] [mlir] [MLIR] Add I{8, 16}Enum tablegen classes (PR #190825)

Henrich Lauko llvmlistbot at llvm.org
Tue Apr 7 11:53:09 PDT 2026


================
@@ -130,3 +140,13 @@ def MyNonQuotedPrintBitEnum
 // DECL: inline ::llvm::raw_ostream &operator<<(::llvm::raw_ostream &p, ::MyNonQuotedPrintBitEnum value) {
 // DECL:   auto valueStr = stringifyEnum(value);
 // DECL-NEXT:   return p << valueStr;
+
+def MyI8Enum : I8Enum<"MyI8Enum", "Example I8 enum", [
+    I8EnumCase<"a", 254>,
+    I8EnumCase<"b", 255>
+  ]>;
+
+def MyI16Enum : I16Enum<"MyI16Enum", "Example I16 enum", [
+    I8EnumCase<"a", 65534>,
+    I8EnumCase<"b", 65535>
----------------
xlauko wrote:

how is it that this was not caught?

```suggestion
    I16EnumCase<"a", 65534>,
    I16EnumCase<"b", 65535>
```

https://github.com/llvm/llvm-project/pull/190825


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