[Mlir-commits] [flang] [mlir] [mlir][CSE] Introduce hoist-pure-ops logic to CSE pass (PR #180556)

lonely eagle llvmlistbot at llvm.org
Thu Apr 2 03:33:31 PDT 2026


linuxlonelyeagle wrote:





> I've been trying to understand more of the behavior here, and hit a case like this:
> 
> ```
> 
> 
> func.func @cse_multiple_regions(%c: i1, %t: i32) -> (i32, i32) {
>   %init = "test.producer"() : () -> i32
>   %r1 = scf.if %c -> (i32) {
>     %r11 = scf.if %c -> (i32) {
>       %0 = arith.addi %init, %init : i32
>       scf.yield %0 : i32
>     } else {
>       %0 = arith.addi %init, %init : i32
>       scf.yield %0 : i32
>     }
>     scf.yield %r11 : i32
>   } else {
>     scf.yield %t : i32
>   }
>   %r2 = scf.if %c -> (i32) {
>     %r11 = scf.if %c -> (i32) {
>       %0 = arith.addi %init, %init : i32
>       scf.yield %0 : i32
>     } else {
>       %0 = arith.addi %init, %init : i32
>       scf.yield %0 : i32
>     }
>     scf.yield %r11 : i32
>   } else {
>     scf.yield %t : i32
>   }
>   return %r1, %r2 : i32, i32
> }
> ```
> 
> The top level scf.if are copy/pasted (so identical) and the CSE pass generates invalid IR, can you take a look?
> 
> ```
>  error: operand #0 does not dominate this use
>       scf.yield %0 : i32
>       ^
> ```

Thanks for providing the test. I’ve identified the cause of the issue and will fix it as soon as I have a moment. I'm also looking into the remaining dominator tree and testing tasks

https://github.com/llvm/llvm-project/pull/180556


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