[Mlir-commits] [flang] [mlir] [mlir][vector] Rename ConvertVectorToLLVM to NaiveConvertVectorToLLVM (PR #160055)
Andrzej Warzyński
llvmlistbot at llvm.org
Fri Sep 26 00:09:23 PDT 2025
https://github.com/banach-space updated https://github.com/llvm/llvm-project/pull/160055
>From 1c6e71b33dbd177590cb517a84fc1dc802911bf8 Mon Sep 17 00:00:00 2001
From: Andrzej Warzynski <andrzej.warzynski at arm.com>
Date: Mon, 22 Sep 2025 08:48:36 +0000
Subject: [PATCH 1/3] [mlir][vector] Rename ConvertVectorToLLVM to
NaiveConvertVectorToLLVM
Following the discussion in the Tensor Compiler Working Group (see
https://discourse.llvm.org/t/tcdg-tensor-compiler-design-group-meeting-notes-2025-09-17),
this patch renames ConvertVectorToLLVM to NaiveConvertVectorToLLVM.
The new name better reflects the intent of the pass: it serves as a basic
reference implementation for lowering from the Vector dialect to the LLVM
dialect, without any consideration for performance. In practice, performance
tuning requires knowledge of the target architecture, which this pass
deliberately avoids.
---
mlir/include/mlir/Conversion/Passes.h | 2 +-
mlir/include/mlir/Conversion/Passes.td | 2 +-
...VectorToLLVM.h => NaiveConvertVectorToLLVM.h} | 6 +++---
...LLVMPass.h => NaiveConvertVectorToLLVMPass.h} | 10 +++++-----
.../mlir/Dialect/SparseTensor/Pipelines/Passes.h | 6 +++---
.../Conversion/GPUCommon/GPUToLLVMConversion.cpp | 2 +-
mlir/lib/Conversion/VectorToLLVM/CMakeLists.txt | 4 ++--
...orToLLVM.cpp => NaiveConvertVectorToLLVM.cpp} | 6 ++++--
...Pass.cpp => NaiveConvertVectorToLLVMPass.cpp} | 16 ++++++++++------
.../Pipelines/SparseTensorPipelines.cpp | 4 ++--
.../Vector/TransformOps/VectorTransformOps.cpp | 2 +-
mlir/lib/RegisterAllExtensions.cpp | 2 +-
.../VectorToLLVM/pass-option-serialization.mlir | 10 +++++-----
.../VectorToLLVM/use-vector-alignment.mlir | 4 ++--
.../VectorToLLVM/vector-mask-to-llvm.mlir | 4 ++--
.../VectorToLLVM/vector-reduction-to-llvm.mlir | 4 ++--
.../VectorToLLVM/vector-scalable-memcpy.mlir | 2 +-
.../VectorToLLVM/vector-to-llvm-interface.mlir | 2 +-
.../Conversion/VectorToLLVM/vector-to-llvm.mlir | 2 +-
.../VectorToLLVM/vector-xfer-to-llvm.mlir | 4 ++--
mlir/test/Dialect/AMX/legalize-for-llvm.mlir | 2 +-
mlir/test/Dialect/AMX/side-effects.mlir | 2 +-
mlir/test/Dialect/ArmSVE/legalize-for-llvm.mlir | 2 +-
...contract-to-matrix-intrinsics-transforms.mlir | 2 +-
...transpose-to-matrix-intrinsics-transform.mlir | 2 +-
.../X86Vector/cvt-packed-f32-to-bf16.mlir | 2 +-
mlir/test/Dialect/X86Vector/dot-bf16.mlir | 2 +-
.../Dialect/X86Vector/legalize-for-llvm.mlir | 2 +-
.../Arith/CPU/test-arith-expand-ceildivsi.mlir | 2 +-
.../Arith/CPU/test-arith-expand-truncf-extf.mlir | 2 +-
.../CPU/test-wide-int-emulation-addi-i16.mlir | 4 ++--
.../CPU/test-wide-int-emulation-cmpi-i16.mlir | 4 ++--
...t-wide-int-emulation-compare-results-i16.mlir | 2 +-
.../test-wide-int-emulation-constants-i16.mlir | 2 +-
.../CPU/test-wide-int-emulation-fptosi-i64.mlir | 4 ++--
.../CPU/test-wide-int-emulation-fptoui-i64.mlir | 4 ++--
.../CPU/test-wide-int-emulation-max-min-i16.mlir | 4 ++--
.../CPU/test-wide-int-emulation-muli-i16.mlir | 4 ++--
.../CPU/test-wide-int-emulation-shli-i16.mlir | 4 ++--
.../CPU/test-wide-int-emulation-shrsi-i16.mlir | 4 ++--
.../CPU/test-wide-int-emulation-shrui-i16.mlir | 4 ++--
.../CPU/test-wide-int-emulation-sitofp-i32.mlir | 4 ++--
.../CPU/test-wide-int-emulation-subi-i32.mlir | 4 ++--
.../CPU/test-wide-int-emulation-uitofp-i32.mlir | 4 ++--
.../microbench-linalg-async-parallel-for.mlir | 4 ++--
.../CPU/microbench-scf-async-parallel-for.mlir | 6 +++---
.../Dialect/Complex/CPU/correctness.mlir | 2 +-
.../LLVMIR/CPU/X86/test-inline-asm-vector.mlir | 2 +-
.../Dialect/LLVMIR/CPU/test-vp-intrinsic.mlir | 2 +-
.../ArmSME/multi-tile-matmul-mixed-types.mlir | 2 +-
.../Linalg/CPU/ArmSME/multi-tile-matmul.mlir | 2 +-
.../Linalg/CPU/ArmSVE/1d-depthwise-conv.mlir | 2 +-
.../Dialect/Linalg/CPU/ArmSVE/matmul.mlir | 2 +-
.../CPU/ArmSVE/pack-scalable-inner-tile.mlir | 2 +-
.../ArmSVE/pack-unpack-scalable-inner-tile.mlir | 2 +-
.../Dialect/Linalg/CPU/ArmSVE/reduce_1d.mlir | 2 +-
.../Dialect/Linalg/CPU/ArmSVE/reduce_2d.mlir | 2 +-
.../Linalg/CPU/test-one-shot-bufferize.mlir | 2 +-
.../Dialect/MemRef/verify-memref.mlir | 2 +-
.../GPU/CUDA/sm80-lt/sparse-matmul-2-4-hand.mlir | 2 +-
.../GPU/CUDA/sparse-mma-2-4-f16.mlir | 2 +-
.../Standard/CPU/test-ceil-floor-pos-neg.mlir | 4 ++--
.../Dialect/Vector/CPU/AMX/mulf-full.mlir | 2 +-
.../Integration/Dialect/Vector/CPU/AMX/mulf.mlir | 2 +-
.../Dialect/Vector/CPU/AMX/muli-ext.mlir | 2 +-
.../Dialect/Vector/CPU/AMX/muli-full.mlir | 2 +-
.../Integration/Dialect/Vector/CPU/AMX/muli.mlir | 2 +-
.../Dialect/Vector/CPU/AMX/tilezero-block.mlir | 2 +-
.../Dialect/Vector/CPU/AMX/tilezero.mlir | 2 +-
.../CPU/ArmNeon/vector-contract-bfmmla.mlir | 2 +-
.../Vector/CPU/ArmNeon/vector-contract-i8mm.mlir | 2 +-
.../CPU/ArmSVE/arrays-of-scalable-vectors.mlir | 2 +-
.../Dialect/Vector/CPU/ArmSVE/contraction.mlir | 2 +-
.../Dialect/Vector/CPU/ArmSVE/sve.mlir | 2 +-
.../transfer-read-scalable-non-trailing.mlir | 2 +-
.../CPU/ArmSVE/vector-contract-bfmmla.mlir | 2 +-
.../Vector/CPU/ArmSVE/vector-contract-i8mm.mlir | 2 +-
.../Dialect/Vector/CPU/X86Vector/dot.mlir | 2 +-
.../Vector/CPU/X86Vector/mask-compress.mlir | 2 +-
.../Dialect/Vector/CPU/X86Vector/rsqrt.mlir | 2 +-
.../Vector/CPU/X86Vector/sparse-dot-product.mlir | 2 +-
.../Vector/CPU/X86Vector/vp2intersect-i32.mlir | 2 +-
.../Integration/Dialect/Vector/CPU/realloc.mlir | 4 ++--
.../Vector/CPU/reductions-f32-reassoc.mlir | 2 +-
.../Vector/CPU/reductions-f64-reassoc.mlir | 2 +-
.../Dialect/Vector/CPU/shuffle16x16.mlir | 2 +-
.../Dialect/Vector/CPU/transfer-read-1d.mlir | 4 ++--
.../Dialect/Vector/CPU/transfer-read-2d.mlir | 4 ++--
.../Dialect/Vector/CPU/transfer-read-3d.mlir | 4 ++--
.../Dialect/Vector/CPU/transfer-read.mlir | 4 ++--
.../Dialect/Vector/CPU/transfer-to-loops.mlir | 4 ++--
.../GPU/CUDA/test-reduction-distribute.mlir | 2 +-
.../Vector/GPU/CUDA/test-warp-distribute.mlir | 6 +++---
.../Dialect/XeVM/GPU/xevm_block_dpas.mlir | 2 +-
.../Dialect/XeVM/GPU/xevm_block_load_store.mlir | 2 +-
.../GPU/xevm_block_load_store_pack_register.mlir | 2 +-
.../GPU/xevm_block_load_store_transpose.mlir | 2 +-
.../Dialect/XeVM/GPU/xevm_store_cst.mlir | 2 +-
.../CUDA/sm90/tma_load_64x8_8x128_noswizzle.mlir | 2 +-
.../tma_load_64x8_8x128_noswizzle-transform.mlir | 4 ++--
mlir/test/Target/LLVMIR/amx.mlir | 2 +-
mlir/test/Target/LLVMIR/vector-to-llvm-ir.mlir | 2 +-
mlir/test/Target/LLVMIR/x86vector.mlir | 2 +-
mlir/test/lib/Dialect/LLVM/TestLowerToLLVM.cpp | 6 +++---
.../X86Vector/math-polynomial-approx-avx2.mlir | 2 +-
mlir/test/mlir-runner/async-error.mlir | 2 +-
mlir/test/mlir-runner/async-value.mlir | 2 +-
mlir/test/mlir-runner/expand-arith-ops.mlir | 2 +-
.../test/mlir-runner/math-polynomial-approx.mlir | 2 +-
mlir/test/mlir-runner/sgemm-naive-codegen.mlir | 2 +-
.../mlir-runner/test-expand-math-approx.mlir | 2 +-
.../python/integration/dialects/linalg/opsrun.py | 2 +-
mlir/unittests/ExecutionEngine/Invoke.cpp | 2 +-
113 files changed, 170 insertions(+), 164 deletions(-)
rename mlir/include/mlir/Conversion/VectorToLLVM/{ConvertVectorToLLVM.h => NaiveConvertVectorToLLVM.h} (81%)
rename mlir/include/mlir/Conversion/VectorToLLVM/{ConvertVectorToLLVMPass.h => NaiveConvertVectorToLLVMPass.h} (61%)
rename mlir/lib/Conversion/VectorToLLVM/{ConvertVectorToLLVM.cpp => NaiveConvertVectorToLLVM.cpp} (99%)
rename mlir/lib/Conversion/VectorToLLVM/{ConvertVectorToLLVMPass.cpp => NaiveConvertVectorToLLVMPass.cpp} (91%)
diff --git a/mlir/include/mlir/Conversion/Passes.h b/mlir/include/mlir/Conversion/Passes.h
index da061b269daf7..cc247ac424ee0 100644
--- a/mlir/include/mlir/Conversion/Passes.h
+++ b/mlir/include/mlir/Conversion/Passes.h
@@ -78,7 +78,7 @@
#include "mlir/Conversion/VectorToAMX/VectorToAMX.h"
#include "mlir/Conversion/VectorToArmSME/VectorToArmSME.h"
#include "mlir/Conversion/VectorToGPU/VectorToGPU.h"
-#include "mlir/Conversion/VectorToLLVM/ConvertVectorToLLVMPass.h"
+#include "mlir/Conversion/VectorToLLVM/NaiveConvertVectorToLLVMPass.h"
#include "mlir/Conversion/VectorToSCF/VectorToSCF.h"
#include "mlir/Conversion/VectorToSPIRV/VectorToSPIRVPass.h"
#include "mlir/Conversion/VectorToXeGPU/VectorToXeGPU.h"
diff --git a/mlir/include/mlir/Conversion/Passes.td b/mlir/include/mlir/Conversion/Passes.td
index 3c18ecc753d0f..d4ad9b8a95eb7 100644
--- a/mlir/include/mlir/Conversion/Passes.td
+++ b/mlir/include/mlir/Conversion/Passes.td
@@ -1427,7 +1427,7 @@ def ConvertArmSMEToLLVM : InterfacePass<"convert-arm-sme-to-llvm", "FunctionOpIn
// VectorToLLVM
//===----------------------------------------------------------------------===//
-def ConvertVectorToLLVMPass : Pass<"convert-vector-to-llvm"> {
+def NaiveConvertVectorToLLVMPass : Pass<"naive-convert-vector-to-llvm"> {
let summary = "Lower the operations from the vector dialect into the LLVM "
"dialect";
let description = [{
diff --git a/mlir/include/mlir/Conversion/VectorToLLVM/ConvertVectorToLLVM.h b/mlir/include/mlir/Conversion/VectorToLLVM/NaiveConvertVectorToLLVM.h
similarity index 81%
rename from mlir/include/mlir/Conversion/VectorToLLVM/ConvertVectorToLLVM.h
rename to mlir/include/mlir/Conversion/VectorToLLVM/NaiveConvertVectorToLLVM.h
index cfb6cc313bc63..1e700e880dbd0 100644
--- a/mlir/include/mlir/Conversion/VectorToLLVM/ConvertVectorToLLVM.h
+++ b/mlir/include/mlir/Conversion/VectorToLLVM/NaiveConvertVectorToLLVM.h
@@ -5,8 +5,8 @@
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
-#ifndef MLIR_CONVERSION_VECTORTOLLVM_CONVERTVECTORTOLLVM_H_
-#define MLIR_CONVERSION_VECTORTOLLVM_CONVERTVECTORTOLLVM_H_
+#ifndef MLIR_CONVERSION_VECTORTOLLVM_NAIVECONVERTVECTORTOLLVM_H_
+#define MLIR_CONVERSION_VECTORTOLLVM_NAIVECONVERTVECTORTOLLVM_H_
#include "mlir/Transforms/DialectConversion.h"
@@ -24,4 +24,4 @@ void registerConvertVectorToLLVMInterface(DialectRegistry ®istry);
}
} // namespace mlir
-#endif // MLIR_CONVERSION_VECTORTOLLVM_CONVERTVECTORTOLLVM_H_
+#endif // MLIR_CONVERSION_VECTORTOLLVM_NAIVECONVERTVECTORTOLLVM_H_
diff --git a/mlir/include/mlir/Conversion/VectorToLLVM/ConvertVectorToLLVMPass.h b/mlir/include/mlir/Conversion/VectorToLLVM/NaiveConvertVectorToLLVMPass.h
similarity index 61%
rename from mlir/include/mlir/Conversion/VectorToLLVM/ConvertVectorToLLVMPass.h
rename to mlir/include/mlir/Conversion/VectorToLLVM/NaiveConvertVectorToLLVMPass.h
index 410b881db7959..395104498293d 100644
--- a/mlir/include/mlir/Conversion/VectorToLLVM/ConvertVectorToLLVMPass.h
+++ b/mlir/include/mlir/Conversion/VectorToLLVM/NaiveConvertVectorToLLVMPass.h
@@ -5,16 +5,16 @@
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
-#ifndef MLIR_CONVERSION_VECTORTOLLVM_CONVERTVECTORTOLLVMPASS_H_
-#define MLIR_CONVERSION_VECTORTOLLVM_CONVERTVECTORTOLLVMPASS_H_
+#ifndef MLIR_CONVERSION_VECTORTOLLVM_NAIVECONVERTVECTORTOLLVMPASS_H_
+#define MLIR_CONVERSION_VECTORTOLLVM_NAIVECONVERTVECTORTOLLVMPASS_H_
-#include "mlir/Conversion/VectorToLLVM/ConvertVectorToLLVM.h"
+#include "mlir/Conversion/VectorToLLVM/NaiveConvertVectorToLLVM.h"
#include "mlir/Dialect/Vector/Transforms/VectorTransforms.h"
namespace mlir {
class Pass;
-#define GEN_PASS_DECL_CONVERTVECTORTOLLVMPASS
+#define GEN_PASS_DECL_NAIVECONVERTVECTORTOLLVMPASS
#include "mlir/Conversion/Passes.h.inc"
} // namespace mlir
-#endif // MLIR_CONVERSION_VECTORTOLLVM_CONVERTVECTORTOLLVMPASS_H_
+#endif // MLIR_CONVERSION_VECTORTOLLVM_NAIVECONVERTVECTORTOLLVMPASS_H_
diff --git a/mlir/include/mlir/Dialect/SparseTensor/Pipelines/Passes.h b/mlir/include/mlir/Dialect/SparseTensor/Pipelines/Passes.h
index efbe5c56a219b..ac5c3fa281383 100644
--- a/mlir/include/mlir/Dialect/SparseTensor/Pipelines/Passes.h
+++ b/mlir/include/mlir/Dialect/SparseTensor/Pipelines/Passes.h
@@ -13,7 +13,7 @@
#ifndef MLIR_DIALECT_SPARSETENSOR_PIPELINES_PASSES_H_
#define MLIR_DIALECT_SPARSETENSOR_PIPELINES_PASSES_H_
-#include "mlir/Conversion/VectorToLLVM/ConvertVectorToLLVMPass.h"
+#include "mlir/Conversion/VectorToLLVM/NaiveConvertVectorToLLVMPass.h"
#include "mlir/Dialect/SparseTensor/Transforms/Passes.h"
#include "mlir/Pass/PassOptions.h"
@@ -162,8 +162,8 @@ struct SparsifierOptions : public PassPipelineOptions<SparsifierOptions> {
}
/// Projects out the options for `createConvertVectorToLLVMPass`.
- ConvertVectorToLLVMPassOptions convertVectorToLLVMOptions() const {
- ConvertVectorToLLVMPassOptions opts{};
+ NaiveConvertVectorToLLVMPassOptions convertVectorToLLVMOptions() const {
+ NaiveConvertVectorToLLVMPassOptions opts{};
opts.reassociateFPReductions = reassociateFPReductions;
opts.force32BitVectorIndices = force32BitVectorIndices;
opts.armNeon = armNeon;
diff --git a/mlir/lib/Conversion/GPUCommon/GPUToLLVMConversion.cpp b/mlir/lib/Conversion/GPUCommon/GPUToLLVMConversion.cpp
index 5994b64f3d9a5..d8ef71c9ec911 100644
--- a/mlir/lib/Conversion/GPUCommon/GPUToLLVMConversion.cpp
+++ b/mlir/lib/Conversion/GPUCommon/GPUToLLVMConversion.cpp
@@ -24,7 +24,7 @@
#include "mlir/Conversion/GPUCommon/GPUToLLVM.h"
#include "mlir/Conversion/LLVMCommon/Pattern.h"
#include "mlir/Conversion/MemRefToLLVM/MemRefToLLVM.h"
-#include "mlir/Conversion/VectorToLLVM/ConvertVectorToLLVM.h"
+#include "mlir/Conversion/VectorToLLVM/NaiveConvertVectorToLLVM.h"
#include "mlir/Dialect/Async/IR/Async.h"
#include "mlir/Dialect/GPU/IR/GPUDialect.h"
#include "mlir/Dialect/GPU/Transforms/Passes.h"
diff --git a/mlir/lib/Conversion/VectorToLLVM/CMakeLists.txt b/mlir/lib/Conversion/VectorToLLVM/CMakeLists.txt
index 8e2620029c354..1106799cf6904 100644
--- a/mlir/lib/Conversion/VectorToLLVM/CMakeLists.txt
+++ b/mlir/lib/Conversion/VectorToLLVM/CMakeLists.txt
@@ -1,6 +1,6 @@
add_mlir_conversion_library(MLIRVectorToLLVM
PARTIAL_SOURCES_INTENDED
- ConvertVectorToLLVM.cpp
+ NaiveConvertVectorToLLVM.cpp
ADDITIONAL_HEADER_DIRS
${MLIR_MAIN_INCLUDE_DIR}/mlir/Conversion/VectorToLLVM
@@ -27,7 +27,7 @@ add_mlir_conversion_library(MLIRVectorToLLVM
add_mlir_conversion_library(MLIRVectorToLLVMPass
PARTIAL_SOURCES_INTENDED
- ConvertVectorToLLVMPass.cpp
+ NaiveConvertVectorToLLVMPass.cpp
ADDITIONAL_HEADER_DIRS
${MLIR_MAIN_INCLUDE_DIR}/mlir/Conversion/VectorToLLVM
diff --git a/mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp b/mlir/lib/Conversion/VectorToLLVM/NaiveConvertVectorToLLVM.cpp
similarity index 99%
rename from mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp
rename to mlir/lib/Conversion/VectorToLLVM/NaiveConvertVectorToLLVM.cpp
index e0b1a88d01cdc..78140e33dac52 100644
--- a/mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp
+++ b/mlir/lib/Conversion/VectorToLLVM/NaiveConvertVectorToLLVM.cpp
@@ -1,12 +1,14 @@
-//===- VectorToLLVM.cpp - Conversion from Vector to the LLVM dialect ------===//
+//===- VectorToLLVM.cpp ---------------------------------------------------===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
+// (Naive) Conversion from Vector to the LLVM dialect
+//===----------------------------------------------------------------------===//
-#include "mlir/Conversion/VectorToLLVM/ConvertVectorToLLVM.h"
+#include "mlir/Conversion/VectorToLLVM/NaiveConvertVectorToLLVM.h"
#include "mlir/Conversion/ArithCommon/AttrToLLVMConverter.h"
#include "mlir/Conversion/ConvertToLLVM/ToLLVMInterface.h"
diff --git a/mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVMPass.cpp b/mlir/lib/Conversion/VectorToLLVM/NaiveConvertVectorToLLVMPass.cpp
similarity index 91%
rename from mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVMPass.cpp
rename to mlir/lib/Conversion/VectorToLLVM/NaiveConvertVectorToLLVMPass.cpp
index f958edf2746e9..1f4f88672c307 100644
--- a/mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVMPass.cpp
+++ b/mlir/lib/Conversion/VectorToLLVM/NaiveConvertVectorToLLVMPass.cpp
@@ -1,12 +1,15 @@
-//===- VectorToLLVM.cpp - Conversion from Vector to the LLVM dialect ------===//
+//===- NaiveConverVectorToLLVM.cpp
+//-----------------------------------------===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
+// (Naive) Conversion from Vector to the LLVM dialect
+//===----------------------------------------------------------------------===//
-#include "mlir/Conversion/VectorToLLVM/ConvertVectorToLLVMPass.h"
+#include "mlir/Conversion/VectorToLLVM/NaiveConvertVectorToLLVMPass.h"
#include "mlir/Conversion/LLVMCommon/ConversionTarget.h"
#include "mlir/Conversion/LLVMCommon/TypeConverter.h"
@@ -28,7 +31,7 @@
#include "mlir/Transforms/GreedyPatternRewriteDriver.h"
namespace mlir {
-#define GEN_PASS_DEF_CONVERTVECTORTOLLVMPASS
+#define GEN_PASS_DEF_NAIVECONVERTVECTORTOLLVMPASS
#include "mlir/Conversion/Passes.h.inc"
} // namespace mlir
@@ -36,8 +39,9 @@ using namespace mlir;
using namespace mlir::vector;
namespace {
-struct ConvertVectorToLLVMPass
- : public impl::ConvertVectorToLLVMPassBase<ConvertVectorToLLVMPass> {
+struct NaiveConvertVectorToLLVMPass
+ : public impl::NaiveConvertVectorToLLVMPassBase<
+ NaiveConvertVectorToLLVMPass> {
using Base::Base;
@@ -60,7 +64,7 @@ struct ConvertVectorToLLVMPass
};
} // namespace
-void ConvertVectorToLLVMPass::runOnOperation() {
+void NaiveConvertVectorToLLVMPass::runOnOperation() {
// Perform progressive lowering of operations on slices and all contraction
// operations. Also materializes masks, lowers vector.step, rank-reduces FMA,
// applies folding and DCE.
diff --git a/mlir/lib/Dialect/SparseTensor/Pipelines/SparseTensorPipelines.cpp b/mlir/lib/Dialect/SparseTensor/Pipelines/SparseTensorPipelines.cpp
index dabbea1bdec63..37f050390c492 100644
--- a/mlir/lib/Dialect/SparseTensor/Pipelines/SparseTensorPipelines.cpp
+++ b/mlir/lib/Dialect/SparseTensor/Pipelines/SparseTensorPipelines.cpp
@@ -70,14 +70,14 @@ void mlir::sparse_tensor::buildSparsifier(OpPassManager &pm,
pm.addPass(memref::createExpandStridedMetadataPass());
pm.addPass(createLowerAffinePass());
pm.addPass(
- createConvertVectorToLLVMPass(options.convertVectorToLLVMOptions()));
+ createNaiveConvertVectorToLLVMPass(options.convertVectorToLLVMOptions()));
pm.addNestedPass<func::FuncOp>(createConvertComplexToStandardPass());
pm.addNestedPass<func::FuncOp>(arith::createArithExpandOpsPass());
pm.addNestedPass<func::FuncOp>(createConvertMathToLLVMPass());
pm.addPass(createConvertMathToLibmPass());
pm.addPass(createConvertComplexToLibm());
pm.addPass(
- createConvertVectorToLLVMPass(options.convertVectorToLLVMOptions()));
+ createNaiveConvertVectorToLLVMPass(options.convertVectorToLLVMOptions()));
// Finalize GPU code generation.
if (gpuCodegen) {
diff --git a/mlir/lib/Dialect/Vector/TransformOps/VectorTransformOps.cpp b/mlir/lib/Dialect/Vector/TransformOps/VectorTransformOps.cpp
index 7faa222a9e574..df4c6c8cf15d4 100644
--- a/mlir/lib/Dialect/Vector/TransformOps/VectorTransformOps.cpp
+++ b/mlir/lib/Dialect/Vector/TransformOps/VectorTransformOps.cpp
@@ -9,7 +9,7 @@
#include "mlir/Dialect/Vector/TransformOps/VectorTransformOps.h"
#include "mlir/Conversion/LLVMCommon/TypeConverter.h"
-#include "mlir/Conversion/VectorToLLVM/ConvertVectorToLLVM.h"
+#include "mlir/Conversion/VectorToLLVM/NaiveConvertVectorToLLVM.h"
#include "mlir/Conversion/VectorToSCF/VectorToSCF.h"
#include "mlir/Dialect/LLVMIR/LLVMDialect.h"
#include "mlir/Dialect/Transform/IR/TransformDialect.h"
diff --git a/mlir/lib/RegisterAllExtensions.cpp b/mlir/lib/RegisterAllExtensions.cpp
index 3839172fd0b42..ad9342fa75a0a 100644
--- a/mlir/lib/RegisterAllExtensions.cpp
+++ b/mlir/lib/RegisterAllExtensions.cpp
@@ -31,7 +31,7 @@
#include "mlir/Conversion/PtrToLLVM/PtrToLLVM.h"
#include "mlir/Conversion/SCFToEmitC/SCFToEmitC.h"
#include "mlir/Conversion/UBToLLVM/UBToLLVM.h"
-#include "mlir/Conversion/VectorToLLVM/ConvertVectorToLLVM.h"
+#include "mlir/Conversion/VectorToLLVM/NaiveConvertVectorToLLVM.h"
#include "mlir/Conversion/XeVMToLLVM/XeVMToLLVM.h"
#include "mlir/Dialect/AMX/Transforms.h"
#include "mlir/Dialect/Affine/TransformOps/AffineTransformOps.h"
diff --git a/mlir/test/Conversion/VectorToLLVM/pass-option-serialization.mlir b/mlir/test/Conversion/VectorToLLVM/pass-option-serialization.mlir
index 7e7925a473d53..3940bd99ccea2 100644
--- a/mlir/test/Conversion/VectorToLLVM/pass-option-serialization.mlir
+++ b/mlir/test/Conversion/VectorToLLVM/pass-option-serialization.mlir
@@ -2,8 +2,8 @@
// This test also allows us to exercise these options (to some extent) even if we
// don't use them in other Vector to LLVM conversion tests. This is quite relevant
-// for the `Vector` Dialect (and `--convert-vector-to-llvm` pass) as in many cases
-// we use the Transform Dialect (TD) rather than `--convert-vector-to-llvm` for
+// for the `Vector` Dialect (and `--naive-convert-vector-to-llvm` pass) as in many cases
+// we use the Transform Dialect (TD) rather than `--naive-convert-vector-to-llvm` for
// testing. So here we don't check the correctness of the passes, as they're
// covered by other tests that use TD, but we still provide some test coverage of
// these pass options.
@@ -11,13 +11,13 @@
// We don't need to actually parse any IR to print the pass options. We just need
// to provide --dump-pass-pipeline
-// RUN: mlir-opt --convert-vector-to-llvm --dump-pass-pipeline %s 2>&1 | FileCheck %s --check-prefix=DEFAULT
+// RUN: mlir-opt --naive-convert-vector-to-llvm --dump-pass-pipeline %s 2>&1 | FileCheck %s --check-prefix=DEFAULT
-// RUN: mlir-opt --convert-vector-to-llvm='vector-contract-lowering=llvmintr vector-transpose-lowering=llvmintr' \
+// RUN: mlir-opt --naive-convert-vector-to-llvm='vector-contract-lowering=llvmintr vector-transpose-lowering=llvmintr' \
// RUN: --dump-pass-pipeline %s 2>&1 | FileCheck %s --check-prefix=NON-DEFAULT
// CHECK: builtin.module(
-// CHECK-SAME: convert-vector-to-llvm{
+// CHECK-SAME: naive-convert-vector-to-llvm{
// CHECK-SAME: enable-amx={{[aA-zZ0-9]+}}
// CHECK-SAME: enable-arm-neon={{[aA-zZ0-9]+}}
// CHECK-SAME: enable-arm-sve={{[aA-zZ0-9]+}}
diff --git a/mlir/test/Conversion/VectorToLLVM/use-vector-alignment.mlir b/mlir/test/Conversion/VectorToLLVM/use-vector-alignment.mlir
index 12fe3552ce1b7..80100541f164e 100644
--- a/mlir/test/Conversion/VectorToLLVM/use-vector-alignment.mlir
+++ b/mlir/test/Conversion/VectorToLLVM/use-vector-alignment.mlir
@@ -1,5 +1,5 @@
-// RUN: mlir-opt %s --convert-vector-to-llvm='use-vector-alignment=0' --split-input-file | FileCheck %s --check-prefix=MEMREF-ALIGN
-// RUN: mlir-opt %s --convert-vector-to-llvm='use-vector-alignment=1' --split-input-file | FileCheck %s --check-prefix=VEC-ALIGN
+// RUN: mlir-opt %s --naive-convert-vector-to-llvm='use-vector-alignment=0' --split-input-file | FileCheck %s --check-prefix=MEMREF-ALIGN
+// RUN: mlir-opt %s --naive-convert-vector-to-llvm='use-vector-alignment=1' --split-input-file | FileCheck %s --check-prefix=VEC-ALIGN
//===----------------------------------------------------------------------===//
diff --git a/mlir/test/Conversion/VectorToLLVM/vector-mask-to-llvm.mlir b/mlir/test/Conversion/VectorToLLVM/vector-mask-to-llvm.mlir
index 91e5358622b69..8eea6ff6a312e 100644
--- a/mlir/test/Conversion/VectorToLLVM/vector-mask-to-llvm.mlir
+++ b/mlir/test/Conversion/VectorToLLVM/vector-mask-to-llvm.mlir
@@ -1,5 +1,5 @@
-// RUN: mlir-opt %s --convert-vector-to-llvm='force-32bit-vector-indices=1' | FileCheck %s --check-prefix=CMP32
-// RUN: mlir-opt %s --convert-vector-to-llvm='force-32bit-vector-indices=0' | FileCheck %s --check-prefix=CMP64
+// RUN: mlir-opt %s --naive-convert-vector-to-llvm='force-32bit-vector-indices=1' | FileCheck %s --check-prefix=CMP32
+// RUN: mlir-opt %s --naive-convert-vector-to-llvm='force-32bit-vector-indices=0' | FileCheck %s --check-prefix=CMP64
// CMP32-LABEL: @genbool_var_1d(
// CMP32-SAME: %[[ARG:.*]]: index)
diff --git a/mlir/test/Conversion/VectorToLLVM/vector-reduction-to-llvm.mlir b/mlir/test/Conversion/VectorToLLVM/vector-reduction-to-llvm.mlir
index c7d9e22fb2423..0dc7d101648a2 100644
--- a/mlir/test/Conversion/VectorToLLVM/vector-reduction-to-llvm.mlir
+++ b/mlir/test/Conversion/VectorToLLVM/vector-reduction-to-llvm.mlir
@@ -1,5 +1,5 @@
-// RUN: mlir-opt %s -convert-vector-to-llvm -split-input-file | FileCheck %s
-// RUN: mlir-opt %s -convert-vector-to-llvm='reassociate-fp-reductions' -split-input-file | FileCheck %s --check-prefix=REASSOC
+// RUN: mlir-opt %s -naive-convert-vector-to-llvm -split-input-file | FileCheck %s
+// RUN: mlir-opt %s -naive-convert-vector-to-llvm='reassociate-fp-reductions' -split-input-file | FileCheck %s --check-prefix=REASSOC
// CHECK-LABEL: @reduce_add_f32(
// CHECK-SAME: %[[A:.*]]: vector<16xf32>)
diff --git a/mlir/test/Conversion/VectorToLLVM/vector-scalable-memcpy.mlir b/mlir/test/Conversion/VectorToLLVM/vector-scalable-memcpy.mlir
index 80e6caa05db5e..b24b1c72f8a1f 100644
--- a/mlir/test/Conversion/VectorToLLVM/vector-scalable-memcpy.mlir
+++ b/mlir/test/Conversion/VectorToLLVM/vector-scalable-memcpy.mlir
@@ -1,4 +1,4 @@
-// RUN: mlir-opt %s -convert-vector-to-llvm | mlir-opt | FileCheck %s
+// RUN: mlir-opt %s -naive-convert-vector-to-llvm | mlir-opt | FileCheck %s
// CHECK: vector_scalable_memcopy([[SRC:%arg[0-9]+]]: memref<?xf32>, [[DST:%arg[0-9]+]]
func.func @vector_scalable_memcopy(%src : memref<?xf32>, %dst : memref<?xf32>, %size : index) {
diff --git a/mlir/test/Conversion/VectorToLLVM/vector-to-llvm-interface.mlir b/mlir/test/Conversion/VectorToLLVM/vector-to-llvm-interface.mlir
index 5973c2ba2cbd0..2e73aa8d066e0 100644
--- a/mlir/test/Conversion/VectorToLLVM/vector-to-llvm-interface.mlir
+++ b/mlir/test/Conversion/VectorToLLVM/vector-to-llvm-interface.mlir
@@ -1,6 +1,6 @@
// RUN: mlir-opt --convert-to-llvm="filter-dialects=vector" --split-input-file %s | FileCheck %s
// RUN: mlir-opt --convert-to-llvm="filter-dialects=vector allow-pattern-rollback=0" --split-input-file %s | FileCheck %s
-// RUN: mlir-opt %s -convert-vector-to-llvm -split-input-file | FileCheck %s
+// RUN: mlir-opt %s -naive-convert-vector-to-llvm -split-input-file | FileCheck %s
//===========================================================================//
// Basic tests for Vector-to-LLVM conversion
diff --git a/mlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir b/mlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir
index 2d33888854ea7..816e4c4ddb8d5 100644
--- a/mlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir
+++ b/mlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir
@@ -1,4 +1,4 @@
-// RUN: mlir-opt %s -convert-vector-to-llvm -split-input-file | FileCheck %s
+// RUN: mlir-opt %s -naive-convert-vector-to-llvm -split-input-file | FileCheck %s
//===========================================================================//
// Complex tests for Vector-to-LLVM conversion
diff --git a/mlir/test/Conversion/VectorToLLVM/vector-xfer-to-llvm.mlir b/mlir/test/Conversion/VectorToLLVM/vector-xfer-to-llvm.mlir
index d3f6d7eca90b4..ca3224525bbe5 100644
--- a/mlir/test/Conversion/VectorToLLVM/vector-xfer-to-llvm.mlir
+++ b/mlir/test/Conversion/VectorToLLVM/vector-xfer-to-llvm.mlir
@@ -1,5 +1,5 @@
-// RUN: mlir-opt %s -convert-vector-to-llvm -split-input-file | FileCheck '-D$IDX_TYPE=i32' %s
-// RUN: mlir-opt %s --convert-vector-to-llvm='force-32bit-vector-indices=0' | FileCheck '-D$IDX_TYPE=i64' %s
+// RUN: mlir-opt %s -naive-convert-vector-to-llvm -split-input-file | FileCheck '-D$IDX_TYPE=i32' %s
+// RUN: mlir-opt %s --naive-convert-vector-to-llvm='force-32bit-vector-indices=0' | FileCheck '-D$IDX_TYPE=i64' %s
func.func @transfer_read_write_1d(%A : memref<?xf32>, %base: index) -> vector<17xf32> {
%f7 = arith.constant 7.0: f32
diff --git a/mlir/test/Dialect/AMX/legalize-for-llvm.mlir b/mlir/test/Dialect/AMX/legalize-for-llvm.mlir
index 7e562b00a46a9..5ce9d6c7bc6ef 100644
--- a/mlir/test/Dialect/AMX/legalize-for-llvm.mlir
+++ b/mlir/test/Dialect/AMX/legalize-for-llvm.mlir
@@ -1,4 +1,4 @@
-// RUN: mlir-opt %s -convert-vector-to-llvm="enable-amx" | mlir-opt | FileCheck %s
+// RUN: mlir-opt %s -naive-convert-vector-to-llvm="enable-amx" | mlir-opt | FileCheck %s
// CHECK-LABEL: muli(
// CHECK: llvm.call_intrinsic "llvm.x86.tilezero.internal"
diff --git a/mlir/test/Dialect/AMX/side-effects.mlir b/mlir/test/Dialect/AMX/side-effects.mlir
index 22c76d98c6996..4b0f89a834896 100644
--- a/mlir/test/Dialect/AMX/side-effects.mlir
+++ b/mlir/test/Dialect/AMX/side-effects.mlir
@@ -1,4 +1,4 @@
-// RUN: mlir-opt %s -cse -convert-vector-to-llvm="enable-amx" | FileCheck %s
+// RUN: mlir-opt %s -cse -naive-convert-vector-to-llvm="enable-amx" | FileCheck %s
// With inclusion of memory side-effects, it is expected CSE not to fold multiple
// "tileload" and "tilezero".
diff --git a/mlir/test/Dialect/ArmSVE/legalize-for-llvm.mlir b/mlir/test/Dialect/ArmSVE/legalize-for-llvm.mlir
index 8c658db009adf..44058246d5d8f 100644
--- a/mlir/test/Dialect/ArmSVE/legalize-for-llvm.mlir
+++ b/mlir/test/Dialect/ArmSVE/legalize-for-llvm.mlir
@@ -1,4 +1,4 @@
-// RUN: mlir-opt -convert-vector-to-llvm="enable-arm-sve" -convert-func-to-llvm -convert-arith-to-llvm -cse -reconcile-unrealized-casts -split-input-file %s | FileCheck %s
+// RUN: mlir-opt -naive-convert-vector-to-llvm="enable-arm-sve" -convert-func-to-llvm -convert-arith-to-llvm -cse -reconcile-unrealized-casts -split-input-file %s | FileCheck %s
func.func @arm_sve_sdot(%a: vector<[16]xi8>,
%b: vector<[16]xi8>,
diff --git a/mlir/test/Dialect/Vector/vector-contract-to-matrix-intrinsics-transforms.mlir b/mlir/test/Dialect/Vector/vector-contract-to-matrix-intrinsics-transforms.mlir
index bf4f094263545..15846513dccf2 100644
--- a/mlir/test/Dialect/Vector/vector-contract-to-matrix-intrinsics-transforms.mlir
+++ b/mlir/test/Dialect/Vector/vector-contract-to-matrix-intrinsics-transforms.mlir
@@ -1,4 +1,4 @@
-// RUN: mlir-opt %s --convert-vector-to-llvm='vector-contract-lowering=llvmintr' | FileCheck %s
+// RUN: mlir-opt %s --naive-convert-vector-to-llvm='vector-contract-lowering=llvmintr' | FileCheck %s
#matmat_accesses = [
affine_map<(i, j, k) -> (i, k)>,
diff --git a/mlir/test/Dialect/Vector/vector-transpose-to-matrix-intrinsics-transform.mlir b/mlir/test/Dialect/Vector/vector-transpose-to-matrix-intrinsics-transform.mlir
index f68badaa122cd..8618b2cb0e64d 100644
--- a/mlir/test/Dialect/Vector/vector-transpose-to-matrix-intrinsics-transform.mlir
+++ b/mlir/test/Dialect/Vector/vector-transpose-to-matrix-intrinsics-transform.mlir
@@ -1,4 +1,4 @@
-// RUN: mlir-opt %s --convert-vector-to-llvm='vector-transpose-lowering=llvmintr' --split-input-file | FileCheck %s
+// RUN: mlir-opt %s --naive-convert-vector-to-llvm='vector-transpose-lowering=llvmintr' --split-input-file | FileCheck %s
// CHECK-LABEL: func @transpose(
func.func @transpose(%arg0: vector<2x4xf32>) -> vector<4x2xf32> {
diff --git a/mlir/test/Dialect/X86Vector/cvt-packed-f32-to-bf16.mlir b/mlir/test/Dialect/X86Vector/cvt-packed-f32-to-bf16.mlir
index c97c52f01c3b0..f560ce1001e05 100644
--- a/mlir/test/Dialect/X86Vector/cvt-packed-f32-to-bf16.mlir
+++ b/mlir/test/Dialect/X86Vector/cvt-packed-f32-to-bf16.mlir
@@ -1,7 +1,7 @@
// REQUIRES: target=x86{{.*}}
// RUN: mlir-opt %s \
-// RUN: -convert-vector-to-llvm="enable-x86vector" -convert-to-llvm \
+// RUN: -naive-convert-vector-to-llvm="enable-x86vector" -convert-to-llvm \
// RUN: -reconcile-unrealized-casts | \
// RUN: mlir-translate --mlir-to-llvmir | \
// RUN: llc -mcpu=sapphirerapids | \
diff --git a/mlir/test/Dialect/X86Vector/dot-bf16.mlir b/mlir/test/Dialect/X86Vector/dot-bf16.mlir
index b7ac46a66cebf..d50755211e16e 100644
--- a/mlir/test/Dialect/X86Vector/dot-bf16.mlir
+++ b/mlir/test/Dialect/X86Vector/dot-bf16.mlir
@@ -1,7 +1,7 @@
// REQUIRES: target=x86{{.*}}
// RUN: mlir-opt %s \
-// RUN: -convert-vector-to-llvm="enable-x86vector" -convert-to-llvm \
+// RUN: -naive-convert-vector-to-llvm="enable-x86vector" -convert-to-llvm \
// RUN: -reconcile-unrealized-casts | \
// RUN: mlir-translate --mlir-to-llvmir | \
// RUN: llc -mcpu=sapphirerapids | \
diff --git a/mlir/test/Dialect/X86Vector/legalize-for-llvm.mlir b/mlir/test/Dialect/X86Vector/legalize-for-llvm.mlir
index 72dc899f4f0a6..7354cc6c0ec47 100644
--- a/mlir/test/Dialect/X86Vector/legalize-for-llvm.mlir
+++ b/mlir/test/Dialect/X86Vector/legalize-for-llvm.mlir
@@ -1,4 +1,4 @@
-// RUN: mlir-opt %s -convert-vector-to-llvm="enable-x86vector" | mlir-opt | FileCheck %s
+// RUN: mlir-opt %s -naive-convert-vector-to-llvm="enable-x86vector" | mlir-opt | FileCheck %s
// CHECK-LABEL: func @avx512_mask_rndscale
func.func @avx512_mask_rndscale(
diff --git a/mlir/test/Integration/Dialect/Arith/CPU/test-arith-expand-ceildivsi.mlir b/mlir/test/Integration/Dialect/Arith/CPU/test-arith-expand-ceildivsi.mlir
index bb9cd1c4fa56f..d28c070f35116 100644
--- a/mlir/test/Integration/Dialect/Arith/CPU/test-arith-expand-ceildivsi.mlir
+++ b/mlir/test/Integration/Dialect/Arith/CPU/test-arith-expand-ceildivsi.mlir
@@ -1,7 +1,7 @@
// Check that the ceildivsi lowering is correct.
// We do not check any poison or UB values, as it is not possible to catch them.
-// RUN: mlir-opt %s --convert-vector-to-llvm \
+// RUN: mlir-opt %s --naive-convert-vector-to-llvm \
// RUN: --convert-func-to-llvm --convert-arith-to-llvm | \
// RUN: mlir-runner -e entry --entry-point-result=void \
// RUN: --shared-libs=%mlir_c_runner_utils | \
diff --git a/mlir/test/Integration/Dialect/Arith/CPU/test-arith-expand-truncf-extf.mlir b/mlir/test/Integration/Dialect/Arith/CPU/test-arith-expand-truncf-extf.mlir
index f2970618d5b6e..bca6458bc87c0 100644
--- a/mlir/test/Integration/Dialect/Arith/CPU/test-arith-expand-truncf-extf.mlir
+++ b/mlir/test/Integration/Dialect/Arith/CPU/test-arith-expand-truncf-extf.mlir
@@ -2,7 +2,7 @@
// RUN: mlir-opt %s --convert-func-to-llvm \
// RUN: --arith-expand="include-f4e2m1=true" \
-// RUN: --convert-arith-to-llvm --convert-vector-to-llvm \
+// RUN: --convert-arith-to-llvm --naive-convert-vector-to-llvm \
// RUN: --reconcile-unrealized-casts | \
// RUN: mlir-runner -e entry --entry-point-result=void \
// RUN: --shared-libs=%mlir_c_runner_utils | \
diff --git a/mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-addi-i16.mlir b/mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-addi-i16.mlir
index 11e3baea41181..c108b043da7b0 100644
--- a/mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-addi-i16.mlir
+++ b/mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-addi-i16.mlir
@@ -1,14 +1,14 @@
// Check that the wide integer addition emulation produces the same result as
// wide addition. Emulate i16 ops with i8 ops.
-// RUN: mlir-opt %s --convert-scf-to-cf --convert-cf-to-llvm --convert-vector-to-llvm \
+// RUN: mlir-opt %s --convert-scf-to-cf --convert-cf-to-llvm --naive-convert-vector-to-llvm \
// RUN: --convert-func-to-llvm --convert-arith-to-llvm | \
// RUN: mlir-runner -e entry -entry-point-result=void \
// RUN: --shared-libs=%mlir_c_runner_utils | \
// RUN: FileCheck %s --match-full-lines
// RUN: mlir-opt %s --test-arith-emulate-wide-int="widest-int-supported=8" \
-// RUN: --convert-scf-to-cf --convert-cf-to-llvm --convert-vector-to-llvm \
+// RUN: --convert-scf-to-cf --convert-cf-to-llvm --naive-convert-vector-to-llvm \
// RUN: --convert-func-to-llvm --convert-arith-to-llvm | \
// RUN: mlir-runner -e entry -entry-point-result=void \
// RUN: --shared-libs=%mlir_c_runner_utils | \
diff --git a/mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-cmpi-i16.mlir b/mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-cmpi-i16.mlir
index a96491360def9..747c999cbc518 100644
--- a/mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-cmpi-i16.mlir
+++ b/mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-cmpi-i16.mlir
@@ -2,14 +2,14 @@
// `arith.cmpi`. Emulate i16 ops with i8 ops.
// Ops in functions prefixed with `emulate` will be emulated using i8 types.
-// RUN: mlir-opt %s --convert-scf-to-cf --convert-cf-to-llvm --convert-vector-to-llvm \
+// RUN: mlir-opt %s --convert-scf-to-cf --convert-cf-to-llvm --naive-convert-vector-to-llvm \
// RUN: --convert-func-to-llvm --convert-arith-to-llvm | \
// RUN: mlir-runner -e entry -entry-point-result=void \
// RUN: --shared-libs=%mlir_c_runner_utils | \
// RUN: FileCheck %s --match-full-lines
// RUN: mlir-opt %s --test-arith-emulate-wide-int="widest-int-supported=8" \
-// RUN: --convert-scf-to-cf --convert-cf-to-llvm --convert-vector-to-llvm \
+// RUN: --convert-scf-to-cf --convert-cf-to-llvm --naive-convert-vector-to-llvm \
// RUN: --convert-func-to-llvm --convert-arith-to-llvm | \
// RUN: mlir-runner -e entry -entry-point-result=void \
// RUN: --shared-libs=%mlir_c_runner_utils | \
diff --git a/mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-compare-results-i16.mlir b/mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-compare-results-i16.mlir
index 483c1e604dbcb..0977a86982d53 100644
--- a/mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-compare-results-i16.mlir
+++ b/mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-compare-results-i16.mlir
@@ -3,7 +3,7 @@
// RUN: mlir-opt %s --test-arith-emulate-wide-int="widest-int-supported=8" \
// RUN: --convert-vector-to-scf --convert-scf-to-cf --convert-cf-to-llvm \
-// RUN: --convert-vector-to-llvm --convert-func-to-llvm --convert-arith-to-llvm \
+// RUN: --naive-convert-vector-to-llvm --convert-func-to-llvm --convert-arith-to-llvm \
// RUN: --reconcile-unrealized-casts | \
// RUN: mlir-runner -e entry -entry-point-result=void \
// RUN: --shared-libs="%mlir_c_runner_utils,%mlir_runner_utils" | \
diff --git a/mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-constants-i16.mlir b/mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-constants-i16.mlir
index e3d363ef9ac6c..4e8ac3a3ef582 100644
--- a/mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-constants-i16.mlir
+++ b/mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-constants-i16.mlir
@@ -2,7 +2,7 @@
// constants and that printing works. Emulate i16 ops with i8 ops.
// RUN: mlir-opt %s --test-arith-emulate-wide-int="widest-int-supported=8" \
-// RUN: --convert-vector-to-scf --convert-scf-to-cf --convert-cf-to-llvm --convert-vector-to-llvm \
+// RUN: --convert-vector-to-scf --convert-scf-to-cf --convert-cf-to-llvm --naive-convert-vector-to-llvm \
// RUN: --convert-func-to-llvm --convert-arith-to-llvm --reconcile-unrealized-casts | \
// RUN: mlir-runner -e entry -entry-point-result=void \
// RUN: --shared-libs=%mlir_c_runner_utils | \
diff --git a/mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-fptosi-i64.mlir b/mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-fptosi-i64.mlir
index 0bce669461d3b..cab97f1fbd877 100644
--- a/mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-fptosi-i64.mlir
+++ b/mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-fptosi-i64.mlir
@@ -1,14 +1,14 @@
// Check that the wide integer `arith.fptosi` emulation produces the same result as wide
// `arith.fptosi`. Emulate i64 ops with i32 ops.
-// RUN: mlir-opt %s --convert-scf-to-cf --convert-cf-to-llvm --convert-vector-to-llvm \
+// RUN: mlir-opt %s --convert-scf-to-cf --convert-cf-to-llvm --naive-convert-vector-to-llvm \
// RUN: --convert-func-to-llvm --convert-arith-to-llvm | \
// RUN: mlir-runner -e entry -entry-point-result=void \
// RUN: --shared-libs=%mlir_c_runner_utils | \
// RUN: FileCheck %s --match-full-lines
// RUN: mlir-opt %s --test-arith-emulate-wide-int="widest-int-supported=32" \
-// RUN: --convert-scf-to-cf --convert-cf-to-llvm --convert-vector-to-llvm \
+// RUN: --convert-scf-to-cf --convert-cf-to-llvm --naive-convert-vector-to-llvm \
// RUN: --convert-func-to-llvm --convert-arith-to-llvm | \
// RUN: mlir-runner -e entry -entry-point-result=void \
// RUN: --shared-libs=%mlir_c_runner_utils | \
diff --git a/mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-fptoui-i64.mlir b/mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-fptoui-i64.mlir
index 5d3de8c24e3fa..ec9d7c3208911 100644
--- a/mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-fptoui-i64.mlir
+++ b/mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-fptoui-i64.mlir
@@ -1,14 +1,14 @@
// Check that the wide integer `arith.fptoui` emulation produces the same result as wide
// `arith.fptoui`. Emulate i64 ops with i32 ops.
-// RUN: mlir-opt %s --convert-scf-to-cf --convert-cf-to-llvm --convert-vector-to-llvm \
+// RUN: mlir-opt %s --convert-scf-to-cf --convert-cf-to-llvm --naive-convert-vector-to-llvm \
// RUN: --convert-func-to-llvm --convert-arith-to-llvm | \
// RUN: mlir-runner -e entry -entry-point-result=void \
// RUN: --shared-libs=%mlir_c_runner_utils | \
// RUN: FileCheck %s --match-full-lines
// RUN: mlir-opt %s --test-arith-emulate-wide-int="widest-int-supported=32" \
-// RUN: --convert-scf-to-cf --convert-cf-to-llvm --convert-vector-to-llvm \
+// RUN: --convert-scf-to-cf --convert-cf-to-llvm --naive-convert-vector-to-llvm \
// RUN: --convert-func-to-llvm --convert-arith-to-llvm | \
// RUN: mlir-runner -e entry -entry-point-result=void \
// RUN: --shared-libs=%mlir_c_runner_utils | \
diff --git a/mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-max-min-i16.mlir b/mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-max-min-i16.mlir
index 2efbc3833a4e0..0a371926ab644 100644
--- a/mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-max-min-i16.mlir
+++ b/mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-max-min-i16.mlir
@@ -2,14 +2,14 @@
// same result as wide ops. Emulate i16 ops with i8 ops.
// Ops in functions prefixed with `emulate` will be emulated using i8 types.
-// RUN: mlir-opt %s --convert-scf-to-cf --convert-cf-to-llvm --convert-vector-to-llvm \
+// RUN: mlir-opt %s --convert-scf-to-cf --convert-cf-to-llvm --naive-convert-vector-to-llvm \
// RUN: --convert-func-to-llvm --convert-arith-to-llvm | \
// RUN: mlir-runner -e entry -entry-point-result=void \
// RUN: --shared-libs=%mlir_c_runner_utils | \
// RUN: FileCheck %s --match-full-lines
// RUN: mlir-opt %s --test-arith-emulate-wide-int="widest-int-supported=8" \
-// RUN: --convert-scf-to-cf --convert-cf-to-llvm --convert-vector-to-llvm \
+// RUN: --convert-scf-to-cf --convert-cf-to-llvm --naive-convert-vector-to-llvm \
// RUN: --convert-func-to-llvm --convert-arith-to-llvm | \
// RUN: mlir-runner -e entry -entry-point-result=void \
// RUN: --shared-libs=%mlir_c_runner_utils | \
diff --git a/mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-muli-i16.mlir b/mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-muli-i16.mlir
index 64039299600fb..a989dc77072cd 100644
--- a/mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-muli-i16.mlir
+++ b/mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-muli-i16.mlir
@@ -1,14 +1,14 @@
// Check that the wide integer multiplication emulation produces the same result as wide
// multiplication. Emulate i16 ops with i8 ops.
-// RUN: mlir-opt %s --convert-scf-to-cf --convert-cf-to-llvm --convert-vector-to-llvm \
+// RUN: mlir-opt %s --convert-scf-to-cf --convert-cf-to-llvm --naive-convert-vector-to-llvm \
// RUN: --convert-func-to-llvm --convert-arith-to-llvm | \
// RUN: mlir-runner -e entry -entry-point-result=void \
// RUN: --shared-libs=%mlir_c_runner_utils | \
// RUN: FileCheck %s --match-full-lines
// RUN: mlir-opt %s --test-arith-emulate-wide-int="widest-int-supported=8" \
-// RUN: --convert-scf-to-cf --convert-cf-to-llvm --convert-vector-to-llvm \
+// RUN: --convert-scf-to-cf --convert-cf-to-llvm --naive-convert-vector-to-llvm \
// RUN: --convert-func-to-llvm --convert-arith-to-llvm | \
// RUN: mlir-runner -e entry -entry-point-result=void \
// RUN: --shared-libs=%mlir_c_runner_utils | \
diff --git a/mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-shli-i16.mlir b/mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-shli-i16.mlir
index 818a73b59262d..724a5dac63a6d 100644
--- a/mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-shli-i16.mlir
+++ b/mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-shli-i16.mlir
@@ -1,14 +1,14 @@
// Check that the wide integer `arith.shli` emulation produces the same result as wide
// `arith.shli`. Emulate i16 ops with i8 ops.
-// RUN: mlir-opt %s --convert-scf-to-cf --convert-cf-to-llvm --convert-vector-to-llvm \
+// RUN: mlir-opt %s --convert-scf-to-cf --convert-cf-to-llvm --naive-convert-vector-to-llvm \
// RUN: --convert-func-to-llvm --convert-arith-to-llvm | \
// RUN: mlir-runner -e entry -entry-point-result=void \
// RUN: --shared-libs=%mlir_c_runner_utils | \
// RUN: FileCheck %s --match-full-lines
// RUN: mlir-opt %s --test-arith-emulate-wide-int="widest-int-supported=8" \
-// RUN: --convert-scf-to-cf --convert-cf-to-llvm --convert-vector-to-llvm \
+// RUN: --convert-scf-to-cf --convert-cf-to-llvm --naive-convert-vector-to-llvm \
// RUN: --convert-func-to-llvm --convert-arith-to-llvm | \
// RUN: mlir-runner -e entry -entry-point-result=void \
// RUN: --shared-libs=%mlir_c_runner_utils | \
diff --git a/mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-shrsi-i16.mlir b/mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-shrsi-i16.mlir
index fba3bac1441e3..af658167b5fe2 100644
--- a/mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-shrsi-i16.mlir
+++ b/mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-shrsi-i16.mlir
@@ -1,14 +1,14 @@
// Check that the wide integer `arith.shrsi` emulation produces the same result as wide
// `arith.shrsi`. Emulate i16 ops with i8 ops.
-// RUN: mlir-opt %s --convert-scf-to-cf --convert-cf-to-llvm --convert-vector-to-llvm \
+// RUN: mlir-opt %s --convert-scf-to-cf --convert-cf-to-llvm --naive-convert-vector-to-llvm \
// RUN: --convert-func-to-llvm --convert-arith-to-llvm | \
// RUN: mlir-runner -e entry -entry-point-result=void \
// RUN: --shared-libs=%mlir_c_runner_utils | \
// RUN: FileCheck %s --match-full-lines
// RUN: mlir-opt %s --test-arith-emulate-wide-int="widest-int-supported=8" \
-// RUN: --convert-scf-to-cf --convert-cf-to-llvm --convert-vector-to-llvm \
+// RUN: --convert-scf-to-cf --convert-cf-to-llvm --naive-convert-vector-to-llvm \
// RUN: --convert-func-to-llvm --convert-arith-to-llvm | \
// RUN: mlir-runner -e entry -entry-point-result=void \
// RUN: --shared-libs=%mlir_c_runner_utils | \
diff --git a/mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-shrui-i16.mlir b/mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-shrui-i16.mlir
index 0a6ecc060ac77..f090c1dd1627f 100644
--- a/mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-shrui-i16.mlir
+++ b/mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-shrui-i16.mlir
@@ -1,14 +1,14 @@
// Check that the wide integer `arith.shrui` emulation produces the same result as wide
// `arith.shrui`. Emulate i16 ops with i8 ops.
-// RUN: mlir-opt %s --convert-scf-to-cf --convert-cf-to-llvm --convert-vector-to-llvm \
+// RUN: mlir-opt %s --convert-scf-to-cf --convert-cf-to-llvm --naive-convert-vector-to-llvm \
// RUN: --convert-func-to-llvm --convert-arith-to-llvm | \
// RUN: mlir-runner -e entry -entry-point-result=void \
// RUN: --shared-libs=%mlir_c_runner_utils | \
// RUN: FileCheck %s --match-full-lines
// RUN: mlir-opt %s --test-arith-emulate-wide-int="widest-int-supported=8" \
-// RUN: --convert-scf-to-cf --convert-cf-to-llvm --convert-vector-to-llvm \
+// RUN: --convert-scf-to-cf --convert-cf-to-llvm --naive-convert-vector-to-llvm \
// RUN: --convert-func-to-llvm --convert-arith-to-llvm | \
// RUN: mlir-runner -e entry -entry-point-result=void \
// RUN: --shared-libs=%mlir_c_runner_utils | \
diff --git a/mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-sitofp-i32.mlir b/mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-sitofp-i32.mlir
index 9670d486536c4..1119cbfcbe0f0 100644
--- a/mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-sitofp-i32.mlir
+++ b/mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-sitofp-i32.mlir
@@ -1,14 +1,14 @@
// Check that the wide integer `arith.sitofp` emulation produces the same result as wide
// `arith.sitofp`. Emulate i32 ops with i16 ops.
-// RUN: mlir-opt %s --convert-scf-to-cf --convert-cf-to-llvm --convert-vector-to-llvm \
+// RUN: mlir-opt %s --convert-scf-to-cf --convert-cf-to-llvm --naive-convert-vector-to-llvm \
// RUN: --convert-func-to-llvm --convert-arith-to-llvm | \
// RUN: mlir-runner -e entry -entry-point-result=void \
// RUN: --shared-libs=%mlir_c_runner_utils | \
// RUN: FileCheck %s --match-full-lines
// RUN: mlir-opt %s --test-arith-emulate-wide-int="widest-int-supported=16" \
-// RUN: --convert-scf-to-cf --convert-cf-to-llvm --convert-vector-to-llvm \
+// RUN: --convert-scf-to-cf --convert-cf-to-llvm --naive-convert-vector-to-llvm \
// RUN: --convert-func-to-llvm --convert-arith-to-llvm | \
// RUN: mlir-runner -e entry -entry-point-result=void \
// RUN: --shared-libs=%mlir_c_runner_utils | \
diff --git a/mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-subi-i32.mlir b/mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-subi-i32.mlir
index 05423b754b258..9727344457351 100644
--- a/mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-subi-i32.mlir
+++ b/mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-subi-i32.mlir
@@ -1,13 +1,13 @@
// Ops in this function will be emulated using i16 types.
-// RUN: mlir-opt %s --convert-scf-to-cf --convert-cf-to-llvm --convert-vector-to-llvm \
+// RUN: mlir-opt %s --convert-scf-to-cf --convert-cf-to-llvm --naive-convert-vector-to-llvm \
// RUN: --convert-func-to-llvm --convert-arith-to-llvm | \
// RUN: mlir-runner -e entry -entry-point-result=void \
// RUN: --shared-libs=%mlir_c_runner_utils | \
// RUN: FileCheck %s --match-full-lines
// RUN: mlir-opt %s --test-arith-emulate-wide-int="widest-int-supported=16" \
-// RUN: --convert-scf-to-cf --convert-cf-to-llvm --convert-vector-to-llvm \
+// RUN: --convert-scf-to-cf --convert-cf-to-llvm --naive-convert-vector-to-llvm \
// RUN: --convert-func-to-llvm --convert-arith-to-llvm | \
// RUN: mlir-runner -e entry -entry-point-result=void \
// RUN: --shared-libs=%mlir_c_runner_utils | \
diff --git a/mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-uitofp-i32.mlir b/mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-uitofp-i32.mlir
index 22a318edc863a..fec3f5c738508 100644
--- a/mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-uitofp-i32.mlir
+++ b/mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-uitofp-i32.mlir
@@ -1,14 +1,14 @@
// Check that the wide integer `arith.uitofp` emulation produces the same result as wide
// `arith.uitofp`. Emulate i32 ops with i16 ops.
-// RUN: mlir-opt %s --convert-scf-to-cf --convert-cf-to-llvm --convert-vector-to-llvm \
+// RUN: mlir-opt %s --convert-scf-to-cf --convert-cf-to-llvm --naive-convert-vector-to-llvm \
// RUN: --convert-func-to-llvm --convert-arith-to-llvm | \
// RUN: mlir-runner -e entry -entry-point-result=void \
// RUN: --shared-libs=%mlir_c_runner_utils | \
// RUN: FileCheck %s --match-full-lines
// RUN: mlir-opt %s --test-arith-emulate-wide-int="widest-int-supported=16" \
-// RUN: --convert-scf-to-cf --convert-cf-to-llvm --convert-vector-to-llvm \
+// RUN: --convert-scf-to-cf --convert-cf-to-llvm --naive-convert-vector-to-llvm \
// RUN: --convert-func-to-llvm --convert-arith-to-llvm | \
// RUN: mlir-runner -e entry -entry-point-result=void \
// RUN: --shared-libs=%mlir_c_runner_utils | \
diff --git a/mlir/test/Integration/Dialect/Async/CPU/microbench-linalg-async-parallel-for.mlir b/mlir/test/Integration/Dialect/Async/CPU/microbench-linalg-async-parallel-for.mlir
index 1561e6853ae70..eb6a7fcb445f5 100644
--- a/mlir/test/Integration/Dialect/Async/CPU/microbench-linalg-async-parallel-for.mlir
+++ b/mlir/test/Integration/Dialect/Async/CPU/microbench-linalg-async-parallel-for.mlir
@@ -8,7 +8,7 @@
// RUN: -convert-scf-to-cf \
// RUN: -arith-expand \
// RUN: -memref-expand \
-// RUN: -convert-vector-to-llvm \
+// RUN: -naive-convert-vector-to-llvm \
// RUN: -finalize-memref-to-llvm \
// RUN: -convert-func-to-llvm \
// RUN: -convert-arith-to-llvm \
@@ -24,7 +24,7 @@
// RUN: mlir-opt %s \
// RUN: -convert-linalg-to-loops \
// RUN: -convert-scf-to-cf \
-// RUN: -convert-vector-to-llvm \
+// RUN: -naive-convert-vector-to-llvm \
// RUN: -finalize-memref-to-llvm \
// RUN: -convert-func-to-llvm \
// RUN: -convert-arith-to-llvm \
diff --git a/mlir/test/Integration/Dialect/Async/CPU/microbench-scf-async-parallel-for.mlir b/mlir/test/Integration/Dialect/Async/CPU/microbench-scf-async-parallel-for.mlir
index 4543dca2207c8..0a1a62c5fd32e 100644
--- a/mlir/test/Integration/Dialect/Async/CPU/microbench-scf-async-parallel-for.mlir
+++ b/mlir/test/Integration/Dialect/Async/CPU/microbench-scf-async-parallel-for.mlir
@@ -8,7 +8,7 @@
// RUN: -convert-scf-to-cf \
// RUN: -arith-expand \
// RUN: -memref-expand \
-// RUN: -convert-vector-to-llvm \
+// RUN: -naive-convert-vector-to-llvm \
// RUN: -finalize-memref-to-llvm \
// RUN: -convert-func-to-llvm \
// RUN: -convert-arith-to-llvm \
@@ -31,7 +31,7 @@
// RUN: -convert-scf-to-cf \
// RUN: -arith-expand \
// RUN: -memref-expand \
-// RUN: -convert-vector-to-llvm \
+// RUN: -naive-convert-vector-to-llvm \
// RUN: -finalize-memref-to-llvm \
// RUN: -convert-func-to-llvm \
// RUN: -convert-arith-to-llvm \
@@ -47,7 +47,7 @@
// RUN: mlir-opt %s \
// RUN: -convert-linalg-to-loops \
// RUN: -convert-scf-to-cf \
-// RUN: -convert-vector-to-llvm \
+// RUN: -naive-convert-vector-to-llvm \
// RUN: -finalize-memref-to-llvm \
// RUN: -convert-func-to-llvm \
// RUN: -convert-arith-to-llvm \
diff --git a/mlir/test/Integration/Dialect/Complex/CPU/correctness.mlir b/mlir/test/Integration/Dialect/Complex/CPU/correctness.mlir
index 1bcef0a0df316..7a4ee206bc597 100644
--- a/mlir/test/Integration/Dialect/Complex/CPU/correctness.mlir
+++ b/mlir/test/Integration/Dialect/Complex/CPU/correctness.mlir
@@ -2,7 +2,7 @@
// RUN: -one-shot-bufferize="bufferize-function-boundaries" --canonicalize \
// RUN: -convert-scf-to-cf --convert-complex-to-standard \
// RUN: -finalize-memref-to-llvm -convert-math-to-llvm -convert-math-to-libm \
-// RUN: -convert-vector-to-llvm -convert-complex-to-llvm \
+// RUN: -naive-convert-vector-to-llvm -convert-complex-to-llvm \
// RUN: -convert-func-to-llvm -convert-arith-to-llvm -convert-cf-to-llvm \
// RUN: -reconcile-unrealized-casts |\
// RUN: mlir-runner \
diff --git a/mlir/test/Integration/Dialect/LLVMIR/CPU/X86/test-inline-asm-vector.mlir b/mlir/test/Integration/Dialect/LLVMIR/CPU/X86/test-inline-asm-vector.mlir
index f63aa880e4412..b7ff9a7e3c77b 100644
--- a/mlir/test/Integration/Dialect/LLVMIR/CPU/X86/test-inline-asm-vector.mlir
+++ b/mlir/test/Integration/Dialect/LLVMIR/CPU/X86/test-inline-asm-vector.mlir
@@ -1,4 +1,4 @@
-// RUN: mlir-opt %s -convert-vector-to-scf -convert-scf-to-cf -convert-vector-to-llvm -convert-func-to-llvm -convert-arith-to-llvm -convert-cf-to-llvm -reconcile-unrealized-casts | \
+// RUN: mlir-opt %s -convert-vector-to-scf -convert-scf-to-cf -naive-convert-vector-to-llvm -convert-func-to-llvm -convert-arith-to-llvm -convert-cf-to-llvm -reconcile-unrealized-casts | \
// RUN: mlir-runner -e entry_point_with_all_constants -entry-point-result=void \
// RUN: -shared-libs=%mlir_c_runner_utils
diff --git a/mlir/test/Integration/Dialect/LLVMIR/CPU/test-vp-intrinsic.mlir b/mlir/test/Integration/Dialect/LLVMIR/CPU/test-vp-intrinsic.mlir
index 84270ee132231..829ce8aff6c68 100644
--- a/mlir/test/Integration/Dialect/LLVMIR/CPU/test-vp-intrinsic.mlir
+++ b/mlir/test/Integration/Dialect/LLVMIR/CPU/test-vp-intrinsic.mlir
@@ -1,5 +1,5 @@
// RUN: mlir-opt %s -convert-vector-to-scf -convert-scf-to-cf -convert-cf-to-llvm \
-// RUN: -convert-vector-to-llvm -convert-index-to-llvm -finalize-memref-to-llvm -convert-func-to-llvm -convert-arith-to-llvm \
+// RUN: -naive-convert-vector-to-llvm -convert-index-to-llvm -finalize-memref-to-llvm -convert-func-to-llvm -convert-arith-to-llvm \
// RUN: -reconcile-unrealized-casts | \
// RUN: mlir-translate -mlir-to-llvmir | \
// RUN: %lli --entry-function=entry \
diff --git a/mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/multi-tile-matmul-mixed-types.mlir b/mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/multi-tile-matmul-mixed-types.mlir
index 71798a6affbbc..81eb85b36dfc9 100644
--- a/mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/multi-tile-matmul-mixed-types.mlir
+++ b/mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/multi-tile-matmul-mixed-types.mlir
@@ -1,7 +1,7 @@
// RUN: mlir-opt %s \
// RUN: -transform-interpreter -test-transform-dialect-erase-schedule \
// RUN: -one-shot-bufferize="bufferize-function-boundaries" -canonicalize \
-// RUN: -test-lower-to-arm-sme -convert-vector-to-llvm="enable-arm-sve" \
+// RUN: -test-lower-to-arm-sme -naive-convert-vector-to-llvm="enable-arm-sve" \
// RUN: -test-lower-to-llvm | \
// RUN: %mcr_aarch64_cmd \
// RUN: -e=main -entry-point-result=void \
diff --git a/mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/multi-tile-matmul.mlir b/mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/multi-tile-matmul.mlir
index 243f9e5cde9f5..8bb1c67fa8fdc 100644
--- a/mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/multi-tile-matmul.mlir
+++ b/mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/multi-tile-matmul.mlir
@@ -1,7 +1,7 @@
// RUN: mlir-opt %s \
// RUN: -transform-interpreter -test-transform-dialect-erase-schedule \
// RUN: -one-shot-bufferize="bufferize-function-boundaries" -canonicalize \
-// RUN: -test-lower-to-arm-sme -convert-vector-to-llvm="enable-arm-sve" \
+// RUN: -test-lower-to-arm-sme -naive-convert-vector-to-llvm="enable-arm-sve" \
// RUN: -test-lower-to-llvm | \
// RUN: %mcr_aarch64_cmd \
// RUN: -e=main -entry-point-result=void \
diff --git a/mlir/test/Integration/Dialect/Linalg/CPU/ArmSVE/1d-depthwise-conv.mlir b/mlir/test/Integration/Dialect/Linalg/CPU/ArmSVE/1d-depthwise-conv.mlir
index 3193147552525..8463aa785df0d 100644
--- a/mlir/test/Integration/Dialect/Linalg/CPU/ArmSVE/1d-depthwise-conv.mlir
+++ b/mlir/test/Integration/Dialect/Linalg/CPU/ArmSVE/1d-depthwise-conv.mlir
@@ -1,7 +1,7 @@
// DEFINE: %{compile} = mlir-opt %s \
// DEFINE: -transform-interpreter -test-transform-dialect-erase-schedule \
// DEFINE: -one-shot-bufferize="bufferize-function-boundaries" -lower-vector-mask -buffer-deallocation-pipeline -cse -canonicalize -convert-vector-to-scf -arm-sve-legalize-vector-storage \
-// DEFINE: -convert-vector-to-llvm="enable-arm-sve" -test-lower-to-llvm -o %t
+// DEFINE: -naive-convert-vector-to-llvm="enable-arm-sve" -test-lower-to-llvm -o %t
// DEFINE: %{entry_point} = conv
// DEFINE: %{run} = %mcr_aarch64_cmd %t -e %{entry_point} -entry-point-result=void --march=aarch64 --mattr="+sve"\
// DEFINE: -shared-libs=%native_mlir_runner_utils,%native_mlir_c_runner_utils
diff --git a/mlir/test/Integration/Dialect/Linalg/CPU/ArmSVE/matmul.mlir b/mlir/test/Integration/Dialect/Linalg/CPU/ArmSVE/matmul.mlir
index 3368dd634d228..e920b254cbd07 100644
--- a/mlir/test/Integration/Dialect/Linalg/CPU/ArmSVE/matmul.mlir
+++ b/mlir/test/Integration/Dialect/Linalg/CPU/ArmSVE/matmul.mlir
@@ -1,7 +1,7 @@
// DEFINE: %{compile} = mlir-opt %s \
// DEFINE: -transform-interpreter -test-transform-dialect-erase-schedule \
// DEFINE: -one-shot-bufferize="bufferize-function-boundaries" -buffer-deallocation-pipeline -cse -canonicalize -convert-vector-to-scf -arm-sve-legalize-vector-storage \
-// DEFINE: -convert-vector-to-llvm="enable-arm-sve" -test-lower-to-llvm -o %t
+// DEFINE: -naive-convert-vector-to-llvm="enable-arm-sve" -test-lower-to-llvm -o %t
// DEFINE: %{entry_point} = matmul_f32
// DEFINE: %{run} = %mcr_aarch64_cmd %t -e %{entry_point} -entry-point-result=void --march=aarch64 --mattr="+sve"\
// DEFINE: -shared-libs=%native_mlir_runner_utils,%native_mlir_c_runner_utils
diff --git a/mlir/test/Integration/Dialect/Linalg/CPU/ArmSVE/pack-scalable-inner-tile.mlir b/mlir/test/Integration/Dialect/Linalg/CPU/ArmSVE/pack-scalable-inner-tile.mlir
index ee865d95c5ace..cfb1beae6b70a 100644
--- a/mlir/test/Integration/Dialect/Linalg/CPU/ArmSVE/pack-scalable-inner-tile.mlir
+++ b/mlir/test/Integration/Dialect/Linalg/CPU/ArmSVE/pack-scalable-inner-tile.mlir
@@ -14,7 +14,7 @@
// DEFINE: --transform-interpreter --test-transform-dialect-erase-schedule \
// DEFINE: --lower-vector-mask \
// DEFINE: -canonicalize -cse --convert-vector-to-scf \
-// DEFINE: -arm-sve-legalize-vector-storage -convert-vector-to-llvm="enable-arm-sve" -test-lower-to-llvm -o %t
+// DEFINE: -arm-sve-legalize-vector-storage -naive-convert-vector-to-llvm="enable-arm-sve" -test-lower-to-llvm -o %t
// DEFINE: %{entry_point} = main
// DEFINE: %{run} = %mcr_aarch64_cmd %t -e %{entry_point} -entry-point-result=void --march=aarch64 --mattr="+sve"\
diff --git a/mlir/test/Integration/Dialect/Linalg/CPU/ArmSVE/pack-unpack-scalable-inner-tile.mlir b/mlir/test/Integration/Dialect/Linalg/CPU/ArmSVE/pack-unpack-scalable-inner-tile.mlir
index 85de18ad92d56..53cae3116229a 100644
--- a/mlir/test/Integration/Dialect/Linalg/CPU/ArmSVE/pack-unpack-scalable-inner-tile.mlir
+++ b/mlir/test/Integration/Dialect/Linalg/CPU/ArmSVE/pack-unpack-scalable-inner-tile.mlir
@@ -1,7 +1,7 @@
// DEFINE: %{compile} = mlir-opt %s \
// DEFINE: -transform-interpreter -test-transform-dialect-erase-schedule \
// DEFINE: --lower-vector-mask |\
-// DEFINE: mlir-opt -arm-sve-legalize-vector-storage -convert-vector-to-llvm="enable-arm-sve"\
+// DEFINE: mlir-opt -arm-sve-legalize-vector-storage -naive-convert-vector-to-llvm="enable-arm-sve"\
// DEFINE: -test-lower-to-llvm -o %t
// DEFINE: %{entry_point} = main
// DEFINE: %{run} = %mcr_aarch64_cmd %t -e %{entry_point} -entry-point-result=void --march=aarch64 --mattr="+sve"\
diff --git a/mlir/test/Integration/Dialect/Linalg/CPU/ArmSVE/reduce_1d.mlir b/mlir/test/Integration/Dialect/Linalg/CPU/ArmSVE/reduce_1d.mlir
index 3090e921553c6..fa4ff8e8030a7 100644
--- a/mlir/test/Integration/Dialect/Linalg/CPU/ArmSVE/reduce_1d.mlir
+++ b/mlir/test/Integration/Dialect/Linalg/CPU/ArmSVE/reduce_1d.mlir
@@ -1,7 +1,7 @@
// DEFINE: %{compile} = mlir-opt %s \
// DEFINE: -transform-interpreter -test-transform-dialect-erase-schedule \
// DEFINE: -one-shot-bufferize="bufferize-function-boundaries" -buffer-deallocation-pipeline -cse -canonicalize -convert-vector-to-scf -arm-sve-legalize-vector-storage \
-// DEFINE: -convert-vector-to-llvm="enable-arm-sve" -test-lower-to-llvm -o %t
+// DEFINE: -naive-convert-vector-to-llvm="enable-arm-sve" -test-lower-to-llvm -o %t
// DEFINE: %{entry_point} = reduce_1d_f32
// DEFINE: %{run} = %mcr_aarch64_cmd %t -e %{entry_point} -entry-point-result=void --march=aarch64 --mattr="+sve"\
// DEFINE: -shared-libs=%native_mlir_runner_utils,%native_mlir_c_runner_utils
diff --git a/mlir/test/Integration/Dialect/Linalg/CPU/ArmSVE/reduce_2d.mlir b/mlir/test/Integration/Dialect/Linalg/CPU/ArmSVE/reduce_2d.mlir
index fc0fd40b4d265..3bf07ebb17083 100644
--- a/mlir/test/Integration/Dialect/Linalg/CPU/ArmSVE/reduce_2d.mlir
+++ b/mlir/test/Integration/Dialect/Linalg/CPU/ArmSVE/reduce_2d.mlir
@@ -1,7 +1,7 @@
// DEFINE: %{compile} = mlir-opt %s \
// DEFINE: -transform-interpreter -test-transform-dialect-erase-schedule \
// DEFINE: -one-shot-bufferize="bufferize-function-boundaries" -buffer-deallocation-pipeline -cse -canonicalize -convert-vector-to-scf -arm-sve-legalize-vector-storage \
-// DEFINE: -convert-vector-to-llvm="enable-arm-sve" -test-lower-to-llvm -o %t
+// DEFINE: -naive-convert-vector-to-llvm="enable-arm-sve" -test-lower-to-llvm -o %t
// DEFINE: %{entry_point} = reduce_2d_f32
// DEFINE: %{run} = %mcr_aarch64_cmd %t -e %{entry_point} -entry-point-result=void --march=aarch64 --mattr="+sve"\
// DEFINE: -shared-libs=%native_mlir_runner_utils,%native_mlir_c_runner_utils
diff --git a/mlir/test/Integration/Dialect/Linalg/CPU/test-one-shot-bufferize.mlir b/mlir/test/Integration/Dialect/Linalg/CPU/test-one-shot-bufferize.mlir
index 3675f8865a685..650a770291281 100644
--- a/mlir/test/Integration/Dialect/Linalg/CPU/test-one-shot-bufferize.mlir
+++ b/mlir/test/Integration/Dialect/Linalg/CPU/test-one-shot-bufferize.mlir
@@ -1,6 +1,6 @@
// RUN: mlir-opt %s -pass-pipeline="builtin.module(func.func(canonicalize,cse),one-shot-bufferize{bufferize-function-boundaries})" |\
// RUN: mlir-opt -pass-pipeline="builtin.module(buffer-deallocation-pipeline,convert-bufferization-to-memref,func.func(convert-vector-to-scf,lower-affine,convert-linalg-to-loops))" |\
-// RUN: mlir-opt -pass-pipeline="builtin.module(func.func(canonicalize,convert-scf-to-cf),convert-vector-to-llvm,expand-strided-metadata,lower-affine,convert-arith-to-llvm,finalize-memref-to-llvm,convert-func-to-llvm,convert-cf-to-llvm,reconcile-unrealized-casts)" | \
+// RUN: mlir-opt -pass-pipeline="builtin.module(func.func(canonicalize,convert-scf-to-cf),naive-convert-vector-to-llvm,expand-strided-metadata,lower-affine,convert-arith-to-llvm,finalize-memref-to-llvm,convert-func-to-llvm,convert-cf-to-llvm,reconcile-unrealized-casts)" | \
// RUN: mlir-runner -O3 -e main -entry-point-result=void \
// RUN: -shared-libs=%mlir_runner_utils,%mlir_c_runner_utils |\
diff --git a/mlir/test/Integration/Dialect/MemRef/verify-memref.mlir b/mlir/test/Integration/Dialect/MemRef/verify-memref.mlir
index 9470f3bccd86a..1676502e94eed 100644
--- a/mlir/test/Integration/Dialect/MemRef/verify-memref.mlir
+++ b/mlir/test/Integration/Dialect/MemRef/verify-memref.mlir
@@ -1,6 +1,6 @@
// RUN: mlir-opt %s \
// RUN: -one-shot-bufferize="bufferize-function-boundaries" --canonicalize \
-// RUN: -convert-vector-to-scf -convert-scf-to-cf -convert-vector-to-llvm -finalize-memref-to-llvm\
+// RUN: -convert-vector-to-scf -convert-scf-to-cf -naive-convert-vector-to-llvm -finalize-memref-to-llvm\
// RUN: -convert-func-to-llvm -reconcile-unrealized-casts |\
// RUN: mlir-runner \
// RUN: -e entry -entry-point-result=void \
diff --git a/mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/sm80-lt/sparse-matmul-2-4-hand.mlir b/mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/sm80-lt/sparse-matmul-2-4-hand.mlir
index 661639c50266f..30b3967b943eb 100644
--- a/mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/sm80-lt/sparse-matmul-2-4-hand.mlir
+++ b/mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/sm80-lt/sparse-matmul-2-4-hand.mlir
@@ -1,6 +1,6 @@
// NOTE: this test requires gpu-sm80 and cusparselt
//
-// DEFINE: %{compile} = mlir-opt --convert-vector-to-scf --convert-scf-to-cf -convert-cf-to-llvm --convert-vector-to-llvm \
+// DEFINE: %{compile} = mlir-opt --convert-vector-to-scf --convert-scf-to-cf -convert-cf-to-llvm --naive-convert-vector-to-llvm \
// DEFINE: --convert-arith-to-llvm --gpu-to-llvm --reconcile-unrealized-casts \
// DEFINE: %s
// DEFINE: %{run} = mlir-runner \
diff --git a/mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/sparse-mma-2-4-f16.mlir b/mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/sparse-mma-2-4-f16.mlir
index d8d7c1c39db91..2854205e33d1b 100644
--- a/mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/sparse-mma-2-4-f16.mlir
+++ b/mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/sparse-mma-2-4-f16.mlir
@@ -2,7 +2,7 @@
// NOTE: this test requires gpu-sm80
//
// RUN: mlir-opt \
-// RUN: --pass-pipeline="builtin.module(gpu.module(strip-debuginfo,convert-gpu-to-nvvm,convert-nvgpu-to-nvvm,affine-expand-index-ops,lower-affine,arith-expand,convert-arith-to-llvm),convert-vector-to-llvm,canonicalize,cse)" \
+// RUN: --pass-pipeline="builtin.module(gpu.module(strip-debuginfo,convert-gpu-to-nvvm,convert-nvgpu-to-nvvm,affine-expand-index-ops,lower-affine,arith-expand,convert-arith-to-llvm),naive-convert-vector-to-llvm,canonicalize,cse)" \
// RUN: %s \
// RUN: | mlir-opt --gpu-lower-to-nvvm-pipeline="cubin-chip=sm_80 cubin-features=+ptx71 cubin-format=%gpu_compilation_format" \
// RUN: | mlir-runner \
diff --git a/mlir/test/Integration/Dialect/Standard/CPU/test-ceil-floor-pos-neg.mlir b/mlir/test/Integration/Dialect/Standard/CPU/test-ceil-floor-pos-neg.mlir
index 303511a2b4534..416f577176f51 100644
--- a/mlir/test/Integration/Dialect/Standard/CPU/test-ceil-floor-pos-neg.mlir
+++ b/mlir/test/Integration/Dialect/Standard/CPU/test-ceil-floor-pos-neg.mlir
@@ -1,8 +1,8 @@
-// RUN: mlir-opt %s -pass-pipeline="builtin.module(func.func(convert-vector-to-scf,lower-affine,convert-scf-to-cf,memref-expand,arith-expand),convert-vector-to-llvm,finalize-memref-to-llvm,convert-func-to-llvm,convert-arith-to-llvm,convert-cf-to-llvm,reconcile-unrealized-casts)" | \
+// RUN: mlir-opt %s -pass-pipeline="builtin.module(func.func(convert-vector-to-scf,lower-affine,convert-scf-to-cf,memref-expand,arith-expand),naive-convert-vector-to-llvm,finalize-memref-to-llvm,convert-func-to-llvm,convert-arith-to-llvm,convert-cf-to-llvm,reconcile-unrealized-casts)" | \
// RUN: mlir-runner -e entry -entry-point-result=void \
// RUN: -shared-libs=%mlir_c_runner_utils | \
// RUN: FileCheck %s
-// RUN: mlir-opt %s -pass-pipeline="builtin.module(func.func(convert-vector-to-scf,lower-affine,convert-scf-to-cf,memref-expand,arith-expand),convert-vector-to-llvm,finalize-memref-to-llvm,convert-func-to-llvm,convert-arith-to-llvm,convert-cf-to-llvm,reconcile-unrealized-casts)" | \
+// RUN: mlir-opt %s -pass-pipeline="builtin.module(func.func(convert-vector-to-scf,lower-affine,convert-scf-to-cf,memref-expand,arith-expand),naive-convert-vector-to-llvm,finalize-memref-to-llvm,convert-func-to-llvm,convert-arith-to-llvm,convert-cf-to-llvm,reconcile-unrealized-casts)" | \
// RUN: mlir-runner -e main -entry-point-result=void \
// RUN: -shared-libs=%mlir_c_runner_utils | \
// RUN: FileCheck %s --check-prefix=SCHECK
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/AMX/mulf-full.mlir b/mlir/test/Integration/Dialect/Vector/CPU/AMX/mulf-full.mlir
index 8014bb7d2dcce..563ee5c85df85 100644
--- a/mlir/test/Integration/Dialect/Vector/CPU/AMX/mulf-full.mlir
+++ b/mlir/test/Integration/Dialect/Vector/CPU/AMX/mulf-full.mlir
@@ -1,6 +1,6 @@
// RUN: mlir-opt %s -convert-vector-to-scf -lower-affine \
// RUN: -one-shot-bufferize="bufferize-function-boundaries" \
-// RUN: -convert-scf-to-cf -convert-vector-to-llvm="enable-amx" \
+// RUN: -convert-scf-to-cf -naive-convert-vector-to-llvm="enable-amx" \
// RUN: -finalize-memref-to-llvm -convert-func-to-llvm -reconcile-unrealized-casts | \
// RUN: mlir-translate -mlir-to-llvmir | \
// RUN: %lli --entry-function=entry --mattr="+amx-tile,+amx-int8,+amx-bf16" \
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/AMX/mulf.mlir b/mlir/test/Integration/Dialect/Vector/CPU/AMX/mulf.mlir
index 5f7250f4d4ccb..a721e388c0223 100644
--- a/mlir/test/Integration/Dialect/Vector/CPU/AMX/mulf.mlir
+++ b/mlir/test/Integration/Dialect/Vector/CPU/AMX/mulf.mlir
@@ -1,4 +1,4 @@
-// RUN: mlir-opt %s -convert-vector-to-scf -lower-affine -convert-scf-to-cf -convert-vector-to-llvm="enable-amx" -finalize-memref-to-llvm -convert-func-to-llvm -reconcile-unrealized-casts | \
+// RUN: mlir-opt %s -convert-vector-to-scf -lower-affine -convert-scf-to-cf -naive-convert-vector-to-llvm="enable-amx" -finalize-memref-to-llvm -convert-func-to-llvm -reconcile-unrealized-casts | \
// RUN: mlir-translate -mlir-to-llvmir | \
// RUN: %lli --entry-function=entry --mattr="+amx-tile,+amx-int8,+amx-bf16" --dlopen=%mlir_c_runner_utils | \
// RUN: FileCheck %s
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/AMX/muli-ext.mlir b/mlir/test/Integration/Dialect/Vector/CPU/AMX/muli-ext.mlir
index 5c0618c2e5e54..145e67b5e62a7 100644
--- a/mlir/test/Integration/Dialect/Vector/CPU/AMX/muli-ext.mlir
+++ b/mlir/test/Integration/Dialect/Vector/CPU/AMX/muli-ext.mlir
@@ -1,4 +1,4 @@
-// RUN: mlir-opt %s -convert-vector-to-scf -lower-affine -convert-scf-to-cf -convert-vector-to-llvm="enable-amx" -finalize-memref-to-llvm -convert-func-to-llvm -reconcile-unrealized-casts | \
+// RUN: mlir-opt %s -convert-vector-to-scf -lower-affine -convert-scf-to-cf -naive-convert-vector-to-llvm="enable-amx" -finalize-memref-to-llvm -convert-func-to-llvm -reconcile-unrealized-casts | \
// RUN: mlir-translate -mlir-to-llvmir | \
// RUN: %lli --entry-function=entry --mattr="+amx-tile,+amx-int8,+amx-bf16" --dlopen=%mlir_c_runner_utils | \
// RUN: FileCheck %s
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/AMX/muli-full.mlir b/mlir/test/Integration/Dialect/Vector/CPU/AMX/muli-full.mlir
index a0076db6660d7..6d867952f872b 100644
--- a/mlir/test/Integration/Dialect/Vector/CPU/AMX/muli-full.mlir
+++ b/mlir/test/Integration/Dialect/Vector/CPU/AMX/muli-full.mlir
@@ -1,7 +1,7 @@
// RUN: mlir-opt %s -convert-vector-to-scf -lower-affine \
// RUN: -one-shot-bufferize="bufferize-function-boundaries" \
// RUN: -convert-scf-to-cf \
-// RUN: -convert-vector-to-llvm="enable-amx" \
+// RUN: -naive-convert-vector-to-llvm="enable-amx" \
// RUN: -finalize-memref-to-llvm -convert-func-to-llvm -reconcile-unrealized-casts | \
// RUN: mlir-translate -mlir-to-llvmir | \
// RUN: %lli --entry-function=entry --mattr="+amx-tile,+amx-int8,+amx-bf16" \
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/AMX/muli.mlir b/mlir/test/Integration/Dialect/Vector/CPU/AMX/muli.mlir
index 7b14df8dbd859..ede5ddb4aa4c3 100644
--- a/mlir/test/Integration/Dialect/Vector/CPU/AMX/muli.mlir
+++ b/mlir/test/Integration/Dialect/Vector/CPU/AMX/muli.mlir
@@ -1,4 +1,4 @@
-// RUN: mlir-opt %s -convert-vector-to-scf -lower-affine -convert-scf-to-cf -convert-vector-to-llvm="enable-amx" -finalize-memref-to-llvm -convert-func-to-llvm -reconcile-unrealized-casts | \
+// RUN: mlir-opt %s -convert-vector-to-scf -lower-affine -convert-scf-to-cf -naive-convert-vector-to-llvm="enable-amx" -finalize-memref-to-llvm -convert-func-to-llvm -reconcile-unrealized-casts | \
// RUN: mlir-translate -mlir-to-llvmir | \
// RUN: %lli --entry-function=entry --mattr="+amx-tile,+amx-int8,+amx-bf16" --dlopen=%mlir_c_runner_utils | \
// RUN: FileCheck %s
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/AMX/tilezero-block.mlir b/mlir/test/Integration/Dialect/Vector/CPU/AMX/tilezero-block.mlir
index e35c555f0a85c..ecc7932f392fb 100644
--- a/mlir/test/Integration/Dialect/Vector/CPU/AMX/tilezero-block.mlir
+++ b/mlir/test/Integration/Dialect/Vector/CPU/AMX/tilezero-block.mlir
@@ -1,4 +1,4 @@
-// RUN: mlir-opt %s -convert-vector-to-scf -lower-affine -convert-scf-to-cf -convert-vector-to-llvm="enable-amx" -finalize-memref-to-llvm -convert-func-to-llvm -reconcile-unrealized-casts | \
+// RUN: mlir-opt %s -convert-vector-to-scf -lower-affine -convert-scf-to-cf -naive-convert-vector-to-llvm="enable-amx" -finalize-memref-to-llvm -convert-func-to-llvm -reconcile-unrealized-casts | \
// RUN: mlir-translate -mlir-to-llvmir | \
// RUN: %lli --entry-function=entry --mattr="+amx-tile,+amx-int8,+amx-bf16" --dlopen=%mlir_c_runner_utils | \
// RUN: FileCheck %s
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/AMX/tilezero.mlir b/mlir/test/Integration/Dialect/Vector/CPU/AMX/tilezero.mlir
index 37db0333e3f5d..ae4f813baf0fd 100644
--- a/mlir/test/Integration/Dialect/Vector/CPU/AMX/tilezero.mlir
+++ b/mlir/test/Integration/Dialect/Vector/CPU/AMX/tilezero.mlir
@@ -1,4 +1,4 @@
-// RUN: mlir-opt %s -convert-vector-to-scf -lower-affine -convert-scf-to-cf -convert-vector-to-llvm="enable-amx" -finalize-memref-to-llvm -convert-func-to-llvm -reconcile-unrealized-casts | \
+// RUN: mlir-opt %s -convert-vector-to-scf -lower-affine -convert-scf-to-cf -naive-convert-vector-to-llvm="enable-amx" -finalize-memref-to-llvm -convert-func-to-llvm -reconcile-unrealized-casts | \
// RUN: mlir-translate -mlir-to-llvmir | \
// RUN: %lli --entry-function=entry --mattr="+amx-tile,+amx-int8,+amx-bf16" --dlopen=%mlir_c_runner_utils | \
// RUN: FileCheck %s
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmNeon/vector-contract-bfmmla.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmNeon/vector-contract-bfmmla.mlir
index 25ec524d3310a..a6af0178faa7e 100644
--- a/mlir/test/Integration/Dialect/Vector/CPU/ArmNeon/vector-contract-bfmmla.mlir
+++ b/mlir/test/Integration/Dialect/Vector/CPU/ArmNeon/vector-contract-bfmmla.mlir
@@ -1,7 +1,7 @@
// REQUIRES: arm-emulator
// DEFINE: %{compile} = mlir-opt %s \
-// DEFINE: --convert-vector-to-scf --convert-scf-to-cf --convert-vector-to-llvm='enable-arm-neon enable-arm-bf16' \
+// DEFINE: --convert-vector-to-scf --convert-scf-to-cf --naive-convert-vector-to-llvm='enable-arm-neon enable-arm-bf16' \
// DEFINE: --expand-strided-metadata --convert-to-llvm --finalize-memref-to-llvm \
// DEFINE: --lower-affine --convert-arith-to-llvm --reconcile-unrealized-casts \
// DEFINE: -o %t
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmNeon/vector-contract-i8mm.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmNeon/vector-contract-i8mm.mlir
index f6012bbd3d0b2..5a47a881481e2 100644
--- a/mlir/test/Integration/Dialect/Vector/CPU/ArmNeon/vector-contract-i8mm.mlir
+++ b/mlir/test/Integration/Dialect/Vector/CPU/ArmNeon/vector-contract-i8mm.mlir
@@ -1,7 +1,7 @@
// REQUIRES: arm-emulator
// DEFINE: %{compile} = mlir-opt %s \
-// DEFINE: --convert-vector-to-scf --convert-scf-to-cf --convert-vector-to-llvm='enable-arm-neon enable-arm-i8mm' \
+// DEFINE: --convert-vector-to-scf --convert-scf-to-cf --naive-convert-vector-to-llvm='enable-arm-neon enable-arm-i8mm' \
// DEFINE: --expand-strided-metadata --convert-to-llvm --finalize-memref-to-llvm \
// DEFINE: --lower-affine --convert-arith-to-llvm --reconcile-unrealized-casts \
// DEFINE: -o %t
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/arrays-of-scalable-vectors.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/arrays-of-scalable-vectors.mlir
index 4ce6281d9fd45..77bc35801bc6d 100644
--- a/mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/arrays-of-scalable-vectors.mlir
+++ b/mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/arrays-of-scalable-vectors.mlir
@@ -1,4 +1,4 @@
-// RUN: mlir-opt %s -convert-vector-to-scf -arm-sve-legalize-vector-storage -convert-vector-to-llvm="enable-arm-sve" -test-lower-to-llvm | \
+// RUN: mlir-opt %s -convert-vector-to-scf -arm-sve-legalize-vector-storage -naive-convert-vector-to-llvm="enable-arm-sve" -test-lower-to-llvm | \
// RUN: %mcr_aarch64_cmd -e=entry -entry-point-result=void --march=aarch64 --mattr="+sve" -shared-libs=%native_mlir_c_runner_utils | \
// RUN: FileCheck %s
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/contraction.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/contraction.mlir
index 192f2911a3ee2..ecf210338c578 100644
--- a/mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/contraction.mlir
+++ b/mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/contraction.mlir
@@ -1,6 +1,6 @@
// DEFINE: %{compile} = mlir-opt %s -transform-interpreter -test-transform-dialect-erase-schedule\
// DEFINE: -cse -canonicalize -convert-vector-to-scf -arm-sve-legalize-vector-storage\
-// DEFINE: -convert-vector-to-llvm="enable-arm-sve" -test-lower-to-llvm -o %t
+// DEFINE: -naive-convert-vector-to-llvm="enable-arm-sve" -test-lower-to-llvm -o %t
// DEFINE: %{entry} =
// DEFINE: %{run} = %mcr_aarch64_cmd %t -e=%{entry} -entry-point-result=void --march=aarch64 --mattr="+sve" -shared-libs=%native_mlir_c_runner_utils
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/sve.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/sve.mlir
index 84a8e10388b7c..f0edf471bc09b 100644
--- a/mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/sve.mlir
+++ b/mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/sve.mlir
@@ -1,4 +1,4 @@
-// RUN: mlir-opt %s -lower-affine -convert-vector-to-scf -convert-scf-to-cf -convert-vector-to-llvm="enable-arm-sve" -finalize-memref-to-llvm -convert-func-to-llvm -convert-arith-to-llvm -convert-cf-to-llvm -canonicalize | \
+// RUN: mlir-opt %s -lower-affine -convert-vector-to-scf -convert-scf-to-cf -naive-convert-vector-to-llvm="enable-arm-sve" -finalize-memref-to-llvm -convert-func-to-llvm -convert-arith-to-llvm -convert-cf-to-llvm -canonicalize | \
// RUN: %mcr_aarch64_cmd -e=entry -entry-point-result=void --march=aarch64 --mattr="+sve" -shared-libs=%native_mlir_c_runner_utils | \
// RUN: FileCheck %s
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/transfer-read-scalable-non-trailing.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/transfer-read-scalable-non-trailing.mlir
index 0b1dab9da39c2..d66b1536edc37 100644
--- a/mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/transfer-read-scalable-non-trailing.mlir
+++ b/mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/transfer-read-scalable-non-trailing.mlir
@@ -1,7 +1,7 @@
// REQUIRES: arm-emulator
// DEFINE: %{compile} = mlir-opt %s \
-// DEFINE: --arm-sve-legalize-vector-storage --convert-vector-to-scf --convert-scf-to-cf --convert-vector-to-llvm='enable-arm-sve' \
+// DEFINE: --arm-sve-legalize-vector-storage --convert-vector-to-scf --convert-scf-to-cf --naive-convert-vector-to-llvm='enable-arm-sve' \
// DEFINE: --expand-strided-metadata --lower-affine --convert-to-llvm --finalize-memref-to-llvm --reconcile-unrealized-casts \
// DEFINE: -o %t
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/vector-contract-bfmmla.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/vector-contract-bfmmla.mlir
index 8b209d3f777b5..0fe2c017a2f17 100644
--- a/mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/vector-contract-bfmmla.mlir
+++ b/mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/vector-contract-bfmmla.mlir
@@ -1,7 +1,7 @@
// REQUIRES: arm-emulator
// DEFINE: %{compile} = mlir-opt %s \
-// DEFINE: --convert-vector-to-scf --convert-scf-to-cf --convert-vector-to-llvm='enable-arm-sve enable-arm-bf16' \
+// DEFINE: --convert-vector-to-scf --convert-scf-to-cf --naive-convert-vector-to-llvm='enable-arm-sve enable-arm-bf16' \
// DEFINE: --expand-strided-metadata --convert-to-llvm --finalize-memref-to-llvm \
// DEFINE: --lower-affine --convert-arith-to-llvm --reconcile-unrealized-casts \
// DEFINE: -o %t
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/vector-contract-i8mm.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/vector-contract-i8mm.mlir
index 45fa35d207f44..ad1dfbffd0d09 100644
--- a/mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/vector-contract-i8mm.mlir
+++ b/mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/vector-contract-i8mm.mlir
@@ -1,7 +1,7 @@
// REQUIRES: arm-emulator
// DEFINE: %{compile} = mlir-opt %s \
-// DEFINE: --convert-vector-to-scf --convert-scf-to-cf --convert-vector-to-llvm='enable-arm-sve enable-arm-i8mm' \
+// DEFINE: --convert-vector-to-scf --convert-scf-to-cf --naive-convert-vector-to-llvm='enable-arm-sve enable-arm-i8mm' \
// DEFINE: --expand-strided-metadata --convert-to-llvm --finalize-memref-to-llvm \
// DEFINE: --lower-affine --convert-arith-to-llvm --reconcile-unrealized-casts \
// DEFINE: -o %t
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/X86Vector/dot.mlir b/mlir/test/Integration/Dialect/Vector/CPU/X86Vector/dot.mlir
index aff272c25795c..27ec2bb5a433a 100644
--- a/mlir/test/Integration/Dialect/Vector/CPU/X86Vector/dot.mlir
+++ b/mlir/test/Integration/Dialect/Vector/CPU/X86Vector/dot.mlir
@@ -1,4 +1,4 @@
-// RUN: mlir-opt %s -convert-vector-to-llvm="enable-x86vector" -test-lower-to-llvm | \
+// RUN: mlir-opt %s -naive-convert-vector-to-llvm="enable-x86vector" -test-lower-to-llvm | \
// RUN: mlir-translate --mlir-to-llvmir | \
// RUN: %lli --entry-function=entry --mattr="avx" --dlopen=%mlir_c_runner_utils | \
// RUN: FileCheck %s
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/X86Vector/mask-compress.mlir b/mlir/test/Integration/Dialect/Vector/CPU/X86Vector/mask-compress.mlir
index eda9138d222a0..57d131826f2e5 100644
--- a/mlir/test/Integration/Dialect/Vector/CPU/X86Vector/mask-compress.mlir
+++ b/mlir/test/Integration/Dialect/Vector/CPU/X86Vector/mask-compress.mlir
@@ -1,4 +1,4 @@
-// RUN: mlir-opt %s -convert-vector-to-llvm="enable-x86vector" -test-lower-to-llvm | \
+// RUN: mlir-opt %s -naive-convert-vector-to-llvm="enable-x86vector" -test-lower-to-llvm | \
// RUN: mlir-translate --mlir-to-llvmir | \
// RUN: %lli --entry-function=entry --mattr="avx512bw" --dlopen=%mlir_c_runner_utils | \
// RUN: FileCheck %s
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/X86Vector/rsqrt.mlir b/mlir/test/Integration/Dialect/Vector/CPU/X86Vector/rsqrt.mlir
index 6cc4e6ca69fe3..ba5e531207ee3 100644
--- a/mlir/test/Integration/Dialect/Vector/CPU/X86Vector/rsqrt.mlir
+++ b/mlir/test/Integration/Dialect/Vector/CPU/X86Vector/rsqrt.mlir
@@ -1,4 +1,4 @@
-// RUN: mlir-opt %s -convert-vector-to-llvm="enable-x86vector" -test-lower-to-llvm | \
+// RUN: mlir-opt %s -naive-convert-vector-to-llvm="enable-x86vector" -test-lower-to-llvm | \
// RUN: mlir-translate --mlir-to-llvmir | \
// RUN: %lli --entry-function=entry --mattr="avx" --dlopen=%mlir_c_runner_utils | \
// RUN: FileCheck %s
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/X86Vector/sparse-dot-product.mlir b/mlir/test/Integration/Dialect/Vector/CPU/X86Vector/sparse-dot-product.mlir
index 1c56990d70d30..4fd9536de33bd 100644
--- a/mlir/test/Integration/Dialect/Vector/CPU/X86Vector/sparse-dot-product.mlir
+++ b/mlir/test/Integration/Dialect/Vector/CPU/X86Vector/sparse-dot-product.mlir
@@ -1,4 +1,4 @@
-// RUN: mlir-opt %s -convert-vector-to-llvm="enable-x86vector" -test-lower-to-llvm | \
+// RUN: mlir-opt %s -naive-convert-vector-to-llvm="enable-x86vector" -test-lower-to-llvm | \
// RUN: mlir-translate --mlir-to-llvmir | \
// RUN: %lli --entry-function=entry --mattr="avx512bw,avx512vp2intersect" --dlopen=%mlir_c_runner_utils | \
// RUN: FileCheck %s
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/X86Vector/vp2intersect-i32.mlir b/mlir/test/Integration/Dialect/Vector/CPU/X86Vector/vp2intersect-i32.mlir
index 46124c2ba87c4..a71896cc9e8fc 100644
--- a/mlir/test/Integration/Dialect/Vector/CPU/X86Vector/vp2intersect-i32.mlir
+++ b/mlir/test/Integration/Dialect/Vector/CPU/X86Vector/vp2intersect-i32.mlir
@@ -1,4 +1,4 @@
-// RUN: mlir-opt %s -convert-vector-to-llvm="enable-x86vector" -test-lower-to-llvm | \
+// RUN: mlir-opt %s -naive-convert-vector-to-llvm="enable-x86vector" -test-lower-to-llvm | \
// RUN: mlir-translate --mlir-to-llvmir | \
// RUN: %lli --entry-function=entry --mattr="avx512bw,avx512vp2intersect" --dlopen=%mlir_c_runner_utils | \
// RUN: FileCheck %s
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/realloc.mlir b/mlir/test/Integration/Dialect/Vector/CPU/realloc.mlir
index a42b4bcbd68ce..11e8689c35536 100644
--- a/mlir/test/Integration/Dialect/Vector/CPU/realloc.mlir
+++ b/mlir/test/Integration/Dialect/Vector/CPU/realloc.mlir
@@ -1,7 +1,7 @@
-// RUN: mlir-opt %s -convert-vector-to-scf -expand-realloc -expand-strided-metadata -convert-scf-to-cf -convert-vector-to-llvm -finalize-memref-to-llvm -convert-func-to-llvm -convert-arith-to-llvm -convert-cf-to-llvm -reconcile-unrealized-casts |\
+// RUN: mlir-opt %s -convert-vector-to-scf -expand-realloc -expand-strided-metadata -convert-scf-to-cf -naive-convert-vector-to-llvm -finalize-memref-to-llvm -convert-func-to-llvm -convert-arith-to-llvm -convert-cf-to-llvm -reconcile-unrealized-casts |\
// RUN: mlir-runner -e entry -entry-point-result=void \
// RUN: -shared-libs=%mlir_c_runner_utils
-// RUN: mlir-opt %s -convert-vector-to-scf -expand-realloc -expand-strided-metadata -convert-scf-to-cf -convert-vector-to-llvm -finalize-memref-to-llvm='use-aligned-alloc=1' -convert-func-to-llvm -arith-expand -convert-arith-to-llvm -convert-cf-to-llvm -reconcile-unrealized-casts |\
+// RUN: mlir-opt %s -convert-vector-to-scf -expand-realloc -expand-strided-metadata -convert-scf-to-cf -naive-convert-vector-to-llvm -finalize-memref-to-llvm='use-aligned-alloc=1' -convert-func-to-llvm -arith-expand -convert-arith-to-llvm -convert-cf-to-llvm -reconcile-unrealized-casts |\
// RUN: mlir-runner -e entry -entry-point-result=void \
// RUN: -shared-libs=%mlir_c_runner_utils | FileCheck %s
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/reductions-f32-reassoc.mlir b/mlir/test/Integration/Dialect/Vector/CPU/reductions-f32-reassoc.mlir
index 2bce9e6939d17..f0852e2ae86b9 100644
--- a/mlir/test/Integration/Dialect/Vector/CPU/reductions-f32-reassoc.mlir
+++ b/mlir/test/Integration/Dialect/Vector/CPU/reductions-f32-reassoc.mlir
@@ -1,5 +1,5 @@
// RUN: mlir-opt %s -convert-vector-to-scf -convert-scf-to-cf \
-// RUN: -convert-vector-to-llvm='reassociate-fp-reductions' \
+// RUN: -naive-convert-vector-to-llvm='reassociate-fp-reductions' \
// RUN: -convert-func-to-llvm -convert-arith-to-llvm \
// RUN: -convert-cf-to-llvm -reconcile-unrealized-casts | \
// RUN: mlir-runner -e entry -entry-point-result=void \
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/reductions-f64-reassoc.mlir b/mlir/test/Integration/Dialect/Vector/CPU/reductions-f64-reassoc.mlir
index 661e7aeddadb4..dae33e1f1793a 100644
--- a/mlir/test/Integration/Dialect/Vector/CPU/reductions-f64-reassoc.mlir
+++ b/mlir/test/Integration/Dialect/Vector/CPU/reductions-f64-reassoc.mlir
@@ -1,5 +1,5 @@
// RUN: mlir-opt %s -convert-vector-to-scf -convert-scf-to-cf \
-// RUN: -convert-vector-to-llvm='reassociate-fp-reductions' \
+// RUN: -naive-convert-vector-to-llvm='reassociate-fp-reductions' \
// RUN: -convert-func-to-llvm -convert-arith-to-llvm \
// RUN: -convert-cf-to-llvm -reconcile-unrealized-casts | \
// RUN: mlir-runner -e entry -entry-point-result=void \
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/shuffle16x16.mlir b/mlir/test/Integration/Dialect/Vector/CPU/shuffle16x16.mlir
index 33a76b13c245a..c19a40a80e337 100644
--- a/mlir/test/Integration/Dialect/Vector/CPU/shuffle16x16.mlir
+++ b/mlir/test/Integration/Dialect/Vector/CPU/shuffle16x16.mlir
@@ -1,7 +1,7 @@
// RUN: mlir-opt %s -convert-vector-to-scf -convert-scf-to-cf \
// RUN: -transform-interpreter \
// RUN: -test-transform-dialect-erase-schedule \
-// RUN: -convert-vector-to-llvm -convert-func-to-llvm \
+// RUN: -naive-convert-vector-to-llvm -convert-func-to-llvm \
// RUN: -convert-arith-to-llvm -convert-cf-to-llvm \
// RUN: -convert-ub-to-llvm -reconcile-unrealized-casts | \
// RUN: mlir-runner -e entry -entry-point-result=void \
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/transfer-read-1d.mlir b/mlir/test/Integration/Dialect/Vector/CPU/transfer-read-1d.mlir
index 895b8818de767..2a913c07d144f 100644
--- a/mlir/test/Integration/Dialect/Vector/CPU/transfer-read-1d.mlir
+++ b/mlir/test/Integration/Dialect/Vector/CPU/transfer-read-1d.mlir
@@ -1,9 +1,9 @@
-// RUN: mlir-opt %s -pass-pipeline="builtin.module(func.func(convert-vector-to-scf,expand-strided-metadata,lower-affine,convert-arith-to-llvm,convert-scf-to-cf),convert-vector-to-llvm,finalize-memref-to-llvm,convert-func-to-llvm,convert-arith-to-llvm,convert-ub-to-llvm,convert-cf-to-llvm,reconcile-unrealized-casts)" | \
+// RUN: mlir-opt %s -pass-pipeline="builtin.module(func.func(convert-vector-to-scf,expand-strided-metadata,lower-affine,convert-arith-to-llvm,convert-scf-to-cf),naive-convert-vector-to-llvm,finalize-memref-to-llvm,convert-func-to-llvm,convert-arith-to-llvm,convert-ub-to-llvm,convert-cf-to-llvm,reconcile-unrealized-casts)" | \
// RUN: mlir-runner -e entry -entry-point-result=void \
// RUN: -shared-libs=%mlir_c_runner_utils | \
// RUN: FileCheck %s
-// RUN: mlir-opt %s -pass-pipeline="builtin.module(func.func(convert-vector-to-scf{full-unroll=true},expand-strided-metadata,lower-affine,convert-arith-to-llvm,convert-scf-to-cf),convert-vector-to-llvm,finalize-memref-to-llvm,convert-func-to-llvm,convert-arith-to-llvm,convert-ub-to-llvm,convert-cf-to-llvm,reconcile-unrealized-casts)" | \
+// RUN: mlir-opt %s -pass-pipeline="builtin.module(func.func(convert-vector-to-scf{full-unroll=true},expand-strided-metadata,lower-affine,convert-arith-to-llvm,convert-scf-to-cf),naive-convert-vector-to-llvm,finalize-memref-to-llvm,convert-func-to-llvm,convert-arith-to-llvm,convert-ub-to-llvm,convert-cf-to-llvm,reconcile-unrealized-casts)" | \
// RUN: mlir-runner -e entry -entry-point-result=void \
// RUN: -shared-libs=%mlir_c_runner_utils | \
// RUN: FileCheck %s
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/transfer-read-2d.mlir b/mlir/test/Integration/Dialect/Vector/CPU/transfer-read-2d.mlir
index 80dff9d791f4d..b41e302c809f0 100644
--- a/mlir/test/Integration/Dialect/Vector/CPU/transfer-read-2d.mlir
+++ b/mlir/test/Integration/Dialect/Vector/CPU/transfer-read-2d.mlir
@@ -1,9 +1,9 @@
-// RUN: mlir-opt %s -pass-pipeline="builtin.module(func.func(convert-vector-to-scf,lower-affine,convert-scf-to-cf),convert-vector-to-llvm,finalize-memref-to-llvm,convert-func-to-llvm,convert-arith-to-llvm,convert-cf-to-llvm,convert-ub-to-llvm,reconcile-unrealized-casts)" | \
+// RUN: mlir-opt %s -pass-pipeline="builtin.module(func.func(convert-vector-to-scf,lower-affine,convert-scf-to-cf),naive-convert-vector-to-llvm,finalize-memref-to-llvm,convert-func-to-llvm,convert-arith-to-llvm,convert-cf-to-llvm,convert-ub-to-llvm,reconcile-unrealized-casts)" | \
// RUN: mlir-runner -e entry -entry-point-result=void \
// RUN: -shared-libs=%mlir_c_runner_utils | \
// RUN: FileCheck %s
-// RUN: mlir-opt %s -pass-pipeline="builtin.module(func.func(convert-vector-to-scf{full-unroll=true},lower-affine,convert-scf-to-cf),convert-vector-to-llvm,finalize-memref-to-llvm,convert-func-to-llvm,convert-arith-to-llvm,convert-cf-to-llvm,convert-ub-to-llvm,reconcile-unrealized-casts)" | \
+// RUN: mlir-opt %s -pass-pipeline="builtin.module(func.func(convert-vector-to-scf{full-unroll=true},lower-affine,convert-scf-to-cf),naive-convert-vector-to-llvm,finalize-memref-to-llvm,convert-func-to-llvm,convert-arith-to-llvm,convert-cf-to-llvm,convert-ub-to-llvm,reconcile-unrealized-casts)" | \
// RUN: mlir-runner -e entry -entry-point-result=void \
// RUN: -shared-libs=%mlir_c_runner_utils | \
// RUN: FileCheck %s
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/transfer-read-3d.mlir b/mlir/test/Integration/Dialect/Vector/CPU/transfer-read-3d.mlir
index 93e6a12365268..943d4feb6ff6a 100644
--- a/mlir/test/Integration/Dialect/Vector/CPU/transfer-read-3d.mlir
+++ b/mlir/test/Integration/Dialect/Vector/CPU/transfer-read-3d.mlir
@@ -1,9 +1,9 @@
-// RUN: mlir-opt %s -pass-pipeline="builtin.module(func.func(convert-vector-to-scf,lower-affine,convert-scf-to-cf),convert-vector-to-llvm,finalize-memref-to-llvm,convert-func-to-llvm,convert-arith-to-llvm,convert-cf-to-llvm,convert-ub-to-llvm,reconcile-unrealized-casts)" | \
+// RUN: mlir-opt %s -pass-pipeline="builtin.module(func.func(convert-vector-to-scf,lower-affine,convert-scf-to-cf),naive-convert-vector-to-llvm,finalize-memref-to-llvm,convert-func-to-llvm,convert-arith-to-llvm,convert-cf-to-llvm,convert-ub-to-llvm,reconcile-unrealized-casts)" | \
// RUN: mlir-runner -e entry -entry-point-result=void \
// RUN: -shared-libs=%mlir_c_runner_utils | \
// RUN: FileCheck %s
-// RUN: mlir-opt %s -pass-pipeline="builtin.module(func.func(convert-vector-to-scf{full-unroll=true},lower-affine,convert-scf-to-cf),convert-vector-to-llvm,finalize-memref-to-llvm,convert-func-to-llvm,convert-arith-to-llvm,convert-cf-to-llvm,convert-ub-to-llvm,reconcile-unrealized-casts)" | \
+// RUN: mlir-opt %s -pass-pipeline="builtin.module(func.func(convert-vector-to-scf{full-unroll=true},lower-affine,convert-scf-to-cf),naive-convert-vector-to-llvm,finalize-memref-to-llvm,convert-func-to-llvm,convert-arith-to-llvm,convert-cf-to-llvm,convert-ub-to-llvm,reconcile-unrealized-casts)" | \
// RUN: mlir-runner -e entry -entry-point-result=void \
// RUN: -shared-libs=%mlir_c_runner_utils | \
// RUN: FileCheck %s
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/transfer-read.mlir b/mlir/test/Integration/Dialect/Vector/CPU/transfer-read.mlir
index 18084e31c0ea0..dbbd3aad57795 100644
--- a/mlir/test/Integration/Dialect/Vector/CPU/transfer-read.mlir
+++ b/mlir/test/Integration/Dialect/Vector/CPU/transfer-read.mlir
@@ -1,9 +1,9 @@
-// RUN: mlir-opt %s -pass-pipeline="builtin.module(func.func(convert-vector-to-scf,lower-affine,convert-scf-to-cf),convert-vector-to-llvm,finalize-memref-to-llvm,convert-func-to-llvm,convert-arith-to-llvm,convert-cf-to-llvm,reconcile-unrealized-casts)" | \
+// RUN: mlir-opt %s -pass-pipeline="builtin.module(func.func(convert-vector-to-scf,lower-affine,convert-scf-to-cf),naive-convert-vector-to-llvm,finalize-memref-to-llvm,convert-func-to-llvm,convert-arith-to-llvm,convert-cf-to-llvm,reconcile-unrealized-casts)" | \
// RUN: mlir-runner -e entry -entry-point-result=void \
// RUN: -shared-libs=%mlir_c_runner_utils | \
// RUN: FileCheck %s
-// RUN: mlir-opt %s -pass-pipeline="builtin.module(func.func(convert-vector-to-scf{full-unroll=true},lower-affine,convert-scf-to-cf),convert-vector-to-llvm,finalize-memref-to-llvm,convert-func-to-llvm,convert-arith-to-llvm,convert-cf-to-llvm,reconcile-unrealized-casts)" | \
+// RUN: mlir-opt %s -pass-pipeline="builtin.module(func.func(convert-vector-to-scf{full-unroll=true},lower-affine,convert-scf-to-cf),naive-convert-vector-to-llvm,finalize-memref-to-llvm,convert-func-to-llvm,convert-arith-to-llvm,convert-cf-to-llvm,reconcile-unrealized-casts)" | \
// RUN: mlir-runner -e entry -entry-point-result=void \
// RUN: -shared-libs=%mlir_c_runner_utils | \
// RUN: FileCheck %s
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/transfer-to-loops.mlir b/mlir/test/Integration/Dialect/Vector/CPU/transfer-to-loops.mlir
index a7fec69b69492..f08c5efde2ba7 100644
--- a/mlir/test/Integration/Dialect/Vector/CPU/transfer-to-loops.mlir
+++ b/mlir/test/Integration/Dialect/Vector/CPU/transfer-to-loops.mlir
@@ -1,9 +1,9 @@
-// RUN: mlir-opt %s -pass-pipeline="builtin.module(func.func(convert-vector-to-scf,lower-affine,convert-scf-to-cf),convert-vector-to-llvm,finalize-memref-to-llvm,convert-func-to-llvm,convert-arith-to-llvm,convert-cf-to-llvm,convert-ub-to-llvm,reconcile-unrealized-casts)" | \
+// RUN: mlir-opt %s -pass-pipeline="builtin.module(func.func(convert-vector-to-scf,lower-affine,convert-scf-to-cf),naive-convert-vector-to-llvm,finalize-memref-to-llvm,convert-func-to-llvm,convert-arith-to-llvm,convert-cf-to-llvm,convert-ub-to-llvm,reconcile-unrealized-casts)" | \
// RUN: mlir-runner -e main -entry-point-result=void \
// RUN: -shared-libs=%mlir_runner_utils,%mlir_c_runner_utils | \
// RUN: FileCheck %s
-// RUN: mlir-opt %s -pass-pipeline="builtin.module(func.func(convert-vector-to-scf{full-unroll=true},lower-affine,convert-scf-to-cf),convert-vector-to-llvm,finalize-memref-to-llvm,convert-func-to-llvm,convert-arith-to-llvm,convert-cf-to-llvm,convert-ub-to-llvm,reconcile-unrealized-casts)" | \
+// RUN: mlir-opt %s -pass-pipeline="builtin.module(func.func(convert-vector-to-scf{full-unroll=true},lower-affine,convert-scf-to-cf),naive-convert-vector-to-llvm,finalize-memref-to-llvm,convert-func-to-llvm,convert-arith-to-llvm,convert-cf-to-llvm,convert-ub-to-llvm,reconcile-unrealized-casts)" | \
// RUN: mlir-runner -e main -entry-point-result=void \
// RUN: -shared-libs=%mlir_runner_utils,%mlir_c_runner_utils | \
// RUN: FileCheck %s
diff --git a/mlir/test/Integration/Dialect/Vector/GPU/CUDA/test-reduction-distribute.mlir b/mlir/test/Integration/Dialect/Vector/GPU/CUDA/test-reduction-distribute.mlir
index c35e8e5d92908..24aca229289df 100644
--- a/mlir/test/Integration/Dialect/Vector/GPU/CUDA/test-reduction-distribute.mlir
+++ b/mlir/test/Integration/Dialect/Vector/GPU/CUDA/test-reduction-distribute.mlir
@@ -1,6 +1,6 @@
// RUN: mlir-opt %s -test-vector-warp-distribute="hoist-uniform distribute-transfer-write propagate-distribution" -canonicalize |\
// RUN: mlir-opt -test-vector-warp-distribute=rewrite-warp-ops-to-scf-if |\
-// RUN: mlir-opt -lower-affine -convert-vector-to-scf -convert-scf-to-cf -convert-vector-to-llvm \
+// RUN: mlir-opt -lower-affine -convert-vector-to-scf -convert-scf-to-cf -naive-convert-vector-to-llvm \
// RUN: -convert-arith-to-llvm -gpu-lower-to-nvvm-pipeline | \
// RUN: mlir-runner -e main -entry-point-result=void \
// RUN: -shared-libs=%mlir_cuda_runtime \
diff --git a/mlir/test/Integration/Dialect/Vector/GPU/CUDA/test-warp-distribute.mlir b/mlir/test/Integration/Dialect/Vector/GPU/CUDA/test-warp-distribute.mlir
index f4d02e3346d16..28836df14e83b 100644
--- a/mlir/test/Integration/Dialect/Vector/GPU/CUDA/test-warp-distribute.mlir
+++ b/mlir/test/Integration/Dialect/Vector/GPU/CUDA/test-warp-distribute.mlir
@@ -1,7 +1,7 @@
// Run the test cases without distributing ops to test default lowering. Run
// everything on the same thread.
// RUN: mlir-opt %s -test-vector-warp-distribute=rewrite-warp-ops-to-scf-if -canonicalize | \
-// RUN: mlir-opt -convert-vector-to-scf -convert-scf-to-cf -convert-cf-to-llvm -convert-vector-to-llvm -convert-arith-to-llvm \
+// RUN: mlir-opt -convert-vector-to-scf -convert-scf-to-cf -convert-cf-to-llvm -naive-convert-vector-to-llvm -convert-arith-to-llvm \
// RUN: -gpu-lower-to-nvvm-pipeline | \
// RUN: mlir-runner -e main -entry-point-result=void \
// RUN: -shared-libs=%mlir_cuda_runtime \
@@ -12,7 +12,7 @@
// Run the same test cases with distribution and propagation.
// RUN: mlir-opt %s -test-vector-warp-distribute="hoist-uniform distribute-transfer-write" \
// RUN: -test-vector-warp-distribute=rewrite-warp-ops-to-scf-if -canonicalize | \
-// RUN: mlir-opt -convert-vector-to-scf -convert-scf-to-cf -convert-cf-to-llvm -convert-vector-to-llvm -convert-arith-to-llvm \
+// RUN: mlir-opt -convert-vector-to-scf -convert-scf-to-cf -convert-cf-to-llvm -naive-convert-vector-to-llvm -convert-arith-to-llvm \
// RUN: -gpu-lower-to-nvvm-pipeline | \
// RUN: mlir-runner -e main -entry-point-result=void \
// RUN: -shared-libs=%mlir_cuda_runtime \
@@ -22,7 +22,7 @@
// RUN: mlir-opt %s -test-vector-warp-distribute="hoist-uniform distribute-transfer-write propagate-distribution" \
// RUN: -test-vector-warp-distribute=rewrite-warp-ops-to-scf-if -canonicalize | \
-// RUN: mlir-opt -convert-vector-to-scf -convert-scf-to-cf -convert-cf-to-llvm -convert-vector-to-llvm -convert-arith-to-llvm \
+// RUN: mlir-opt -convert-vector-to-scf -convert-scf-to-cf -convert-cf-to-llvm -naive-convert-vector-to-llvm -convert-arith-to-llvm \
// RUN: -gpu-lower-to-nvvm-pipeline | \
// RUN: mlir-runner -e main -entry-point-result=void \
// RUN: -shared-libs=%mlir_cuda_runtime \
diff --git a/mlir/test/Integration/Dialect/XeVM/GPU/xevm_block_dpas.mlir b/mlir/test/Integration/Dialect/XeVM/GPU/xevm_block_dpas.mlir
index 0bd3d3f4cc409..52398a4552db3 100644
--- a/mlir/test/Integration/Dialect/XeVM/GPU/xevm_block_dpas.mlir
+++ b/mlir/test/Integration/Dialect/XeVM/GPU/xevm_block_dpas.mlir
@@ -1,6 +1,6 @@
// RUN: mlir-opt %s \
// RUN: | mlir-opt -pass-pipeline='builtin.module(cse,func.func(gpu-async-region),xevm-attach-target,gpu.module(convert-gpu-to-llvm-spv{use-64bit-index=true},convert-xevm-to-llvm,cse))' \
-// RUN: | mlir-opt -convert-scf-to-cf -convert-cf-to-llvm -convert-vector-to-llvm -convert-arith-to-llvm \
+// RUN: | mlir-opt -convert-scf-to-cf -convert-cf-to-llvm -naive-convert-vector-to-llvm -convert-arith-to-llvm \
// RUN: | mlir-opt -gpu-to-llvm -reconcile-unrealized-casts -cse -gpu-module-to-binary \
// RUN: | mlir-runner \
// RUN: --shared-libs=%mlir_levelzero_runtime \
diff --git a/mlir/test/Integration/Dialect/XeVM/GPU/xevm_block_load_store.mlir b/mlir/test/Integration/Dialect/XeVM/GPU/xevm_block_load_store.mlir
index cea05b8709d72..c979e8174213f 100644
--- a/mlir/test/Integration/Dialect/XeVM/GPU/xevm_block_load_store.mlir
+++ b/mlir/test/Integration/Dialect/XeVM/GPU/xevm_block_load_store.mlir
@@ -1,6 +1,6 @@
// RUN: mlir-opt %s \
// RUN: | mlir-opt -pass-pipeline='builtin.module(cse,func.func(gpu-async-region),xevm-attach-target,gpu.module(convert-gpu-to-llvm-spv{use-64bit-index=true},convert-xevm-to-llvm,cse))' \
-// RUN: | mlir-opt -convert-scf-to-cf -convert-cf-to-llvm -convert-vector-to-llvm -convert-arith-to-llvm \
+// RUN: | mlir-opt -convert-scf-to-cf -convert-cf-to-llvm -naive-convert-vector-to-llvm -convert-arith-to-llvm \
// RUN: | mlir-opt -gpu-to-llvm -reconcile-unrealized-casts -cse -gpu-module-to-binary \
// RUN: | mlir-runner \
// RUN: --shared-libs=%mlir_levelzero_runtime \
diff --git a/mlir/test/Integration/Dialect/XeVM/GPU/xevm_block_load_store_pack_register.mlir b/mlir/test/Integration/Dialect/XeVM/GPU/xevm_block_load_store_pack_register.mlir
index cb8ab1cbd32d7..2537a563de341 100644
--- a/mlir/test/Integration/Dialect/XeVM/GPU/xevm_block_load_store_pack_register.mlir
+++ b/mlir/test/Integration/Dialect/XeVM/GPU/xevm_block_load_store_pack_register.mlir
@@ -1,6 +1,6 @@
// RUN: mlir-opt %s \
// RUN: | mlir-opt -pass-pipeline='builtin.module(cse,func.func(gpu-async-region),xevm-attach-target,gpu.module(convert-gpu-to-llvm-spv{use-64bit-index=true},convert-xevm-to-llvm,cse))' \
-// RUN: | mlir-opt -convert-scf-to-cf -convert-cf-to-llvm -convert-vector-to-llvm -convert-arith-to-llvm \
+// RUN: | mlir-opt -convert-scf-to-cf -convert-cf-to-llvm -naive-convert-vector-to-llvm -convert-arith-to-llvm \
// RUN: | mlir-opt -gpu-to-llvm -reconcile-unrealized-casts -cse -gpu-module-to-binary \
// RUN: | mlir-runner \
// RUN: --shared-libs=%mlir_levelzero_runtime \
diff --git a/mlir/test/Integration/Dialect/XeVM/GPU/xevm_block_load_store_transpose.mlir b/mlir/test/Integration/Dialect/XeVM/GPU/xevm_block_load_store_transpose.mlir
index 1d164be300246..2b620e1fe3e33 100644
--- a/mlir/test/Integration/Dialect/XeVM/GPU/xevm_block_load_store_transpose.mlir
+++ b/mlir/test/Integration/Dialect/XeVM/GPU/xevm_block_load_store_transpose.mlir
@@ -1,6 +1,6 @@
// RUN: mlir-opt %s \
// RUN: | mlir-opt -pass-pipeline='builtin.module(cse,func.func(gpu-async-region),xevm-attach-target,gpu.module(convert-gpu-to-llvm-spv{use-64bit-index=true},convert-xevm-to-llvm,cse))' \
-// RUN: | mlir-opt -convert-scf-to-cf -convert-cf-to-llvm -convert-vector-to-llvm -convert-arith-to-llvm \
+// RUN: | mlir-opt -convert-scf-to-cf -convert-cf-to-llvm -naive-convert-vector-to-llvm -convert-arith-to-llvm \
// RUN: | mlir-opt -gpu-to-llvm -reconcile-unrealized-casts -cse -gpu-module-to-binary \
// RUN: | mlir-runner \
// RUN: --shared-libs=%mlir_levelzero_runtime \
diff --git a/mlir/test/Integration/Dialect/XeVM/GPU/xevm_store_cst.mlir b/mlir/test/Integration/Dialect/XeVM/GPU/xevm_store_cst.mlir
index c5f4cd5d0bda9..777bf0b09f7d5 100644
--- a/mlir/test/Integration/Dialect/XeVM/GPU/xevm_store_cst.mlir
+++ b/mlir/test/Integration/Dialect/XeVM/GPU/xevm_store_cst.mlir
@@ -1,6 +1,6 @@
// RUN: mlir-opt %s \
// RUN: | mlir-opt -pass-pipeline='builtin.module(cse,func.func(gpu-async-region),xevm-attach-target,gpu.module(convert-gpu-to-llvm-spv{use-64bit-index=true},convert-xevm-to-llvm,cse))' \
-// RUN: | mlir-opt -convert-scf-to-cf -convert-cf-to-llvm -convert-vector-to-llvm -convert-arith-to-llvm \
+// RUN: | mlir-opt -convert-scf-to-cf -convert-cf-to-llvm -naive-convert-vector-to-llvm -convert-arith-to-llvm \
// RUN: | mlir-opt -gpu-to-llvm -reconcile-unrealized-casts -cse -gpu-module-to-binary \
// RUN: | mlir-runner \
// RUN: --shared-libs=%mlir_levelzero_runtime \
diff --git a/mlir/test/Integration/GPU/CUDA/sm90/tma_load_64x8_8x128_noswizzle.mlir b/mlir/test/Integration/GPU/CUDA/sm90/tma_load_64x8_8x128_noswizzle.mlir
index 31ee19500b85d..579754dec6cc7 100644
--- a/mlir/test/Integration/GPU/CUDA/sm90/tma_load_64x8_8x128_noswizzle.mlir
+++ b/mlir/test/Integration/GPU/CUDA/sm90/tma_load_64x8_8x128_noswizzle.mlir
@@ -10,7 +10,7 @@
// RUN: -gpu-kernel-outlining \
// RUN: -convert-nvvm-to-llvm \
// RUN: -convert-scf-to-cf \
-// RUN: -convert-vector-to-llvm \
+// RUN: -naive-convert-vector-to-llvm \
// RUN: -convert-index-to-llvm=index-bitwidth=32 \
// RUN: -convert-arith-to-llvm \
// RUN: -finalize-memref-to-llvm \
diff --git a/mlir/test/Integration/GPU/CUDA/sm90/transform-dialect/tma_load_64x8_8x128_noswizzle-transform.mlir b/mlir/test/Integration/GPU/CUDA/sm90/transform-dialect/tma_load_64x8_8x128_noswizzle-transform.mlir
index a1e2729146c64..8469b76672faa 100644
--- a/mlir/test/Integration/GPU/CUDA/sm90/transform-dialect/tma_load_64x8_8x128_noswizzle-transform.mlir
+++ b/mlir/test/Integration/GPU/CUDA/sm90/transform-dialect/tma_load_64x8_8x128_noswizzle-transform.mlir
@@ -3,7 +3,7 @@
// RUN: -test-transform-dialect-erase-schedule \
// RUN: -convert-nvgpu-to-nvvm -gpu-kernel-outlining \
// RUN: -convert-scf-to-cf -convert-nvvm-to-llvm \
-// RUN: -convert-vector-to-llvm \
+// RUN: -naive-convert-vector-to-llvm \
// RUN: -convert-math-to-llvm \
// RUN: -expand-strided-metadata \
// RUN: -lower-affine \
@@ -30,7 +30,7 @@
// RUN: -test-transform-dialect-erase-schedule \
// RUN: -convert-nvgpu-to-nvvm -gpu-kernel-outlining \
// RUN: -convert-scf-to-cf -convert-nvvm-to-llvm \
-// RUN: -convert-vector-to-llvm \
+// RUN: -naive-convert-vector-to-llvm \
// RUN: -convert-math-to-llvm \
// RUN: -expand-strided-metadata \
// RUN: -lower-affine \
diff --git a/mlir/test/Target/LLVMIR/amx.mlir b/mlir/test/Target/LLVMIR/amx.mlir
index abdf2fe3bd534..490e29816d4b8 100644
--- a/mlir/test/Target/LLVMIR/amx.mlir
+++ b/mlir/test/Target/LLVMIR/amx.mlir
@@ -1,4 +1,4 @@
-// RUN: mlir-opt %s --convert-vector-to-llvm="enable-amx" --convert-to-llvm -reconcile-unrealized-casts \
+// RUN: mlir-opt %s --naive-convert-vector-to-llvm="enable-amx" --convert-to-llvm -reconcile-unrealized-casts \
// RUN: | mlir-translate --mlir-to-llvmir \
// RUN: | FileCheck %s
diff --git a/mlir/test/Target/LLVMIR/vector-to-llvm-ir.mlir b/mlir/test/Target/LLVMIR/vector-to-llvm-ir.mlir
index 9f3eeb569060c..9c0e4d26fa9fc 100644
--- a/mlir/test/Target/LLVMIR/vector-to-llvm-ir.mlir
+++ b/mlir/test/Target/LLVMIR/vector-to-llvm-ir.mlir
@@ -1,4 +1,4 @@
-// RUN: mlir-opt %s -pass-pipeline="builtin.module(convert-vector-to-llvm,func.func(convert-arith-to-llvm),convert-func-to-llvm,reconcile-unrealized-casts)" | mlir-translate -mlir-to-llvmir | FileCheck %s
+// RUN: mlir-opt %s -pass-pipeline="builtin.module(naive-convert-vector-to-llvm,func.func(convert-arith-to-llvm),convert-func-to-llvm,reconcile-unrealized-casts)" | mlir-translate -mlir-to-llvmir | FileCheck %s
func.func @genbool_1d() -> vector<8xi1> {
%0 = vector.constant_mask [4] : vector<8xi1>
diff --git a/mlir/test/Target/LLVMIR/x86vector.mlir b/mlir/test/Target/LLVMIR/x86vector.mlir
index 74ae2424964b1..ebba5622c6992 100644
--- a/mlir/test/Target/LLVMIR/x86vector.mlir
+++ b/mlir/test/Target/LLVMIR/x86vector.mlir
@@ -1,4 +1,4 @@
-// RUN: mlir-opt %s --convert-vector-to-llvm="enable-x86vector" --convert-to-llvm -reconcile-unrealized-casts \
+// RUN: mlir-opt %s --naive-convert-vector-to-llvm="enable-x86vector" --convert-to-llvm -reconcile-unrealized-casts \
// RUN: | mlir-translate --mlir-to-llvmir \
// RUN: | FileCheck %s
diff --git a/mlir/test/lib/Dialect/LLVM/TestLowerToLLVM.cpp b/mlir/test/lib/Dialect/LLVM/TestLowerToLLVM.cpp
index 5a2529d626098..c5e84f94b9468 100644
--- a/mlir/test/lib/Dialect/LLVM/TestLowerToLLVM.cpp
+++ b/mlir/test/lib/Dialect/LLVM/TestLowerToLLVM.cpp
@@ -21,7 +21,7 @@
#include "mlir/Conversion/ReconcileUnrealizedCasts/ReconcileUnrealizedCasts.h"
#include "mlir/Conversion/SCFToControlFlow/SCFToControlFlow.h"
#include "mlir/Conversion/UBToLLVM/UBToLLVM.h"
-#include "mlir/Conversion/VectorToLLVM/ConvertVectorToLLVMPass.h"
+#include "mlir/Conversion/VectorToLLVM/NaiveConvertVectorToLLVMPass.h"
#include "mlir/Conversion/VectorToSCF/VectorToSCF.h"
#include "mlir/Dialect/Func/IR/FuncOps.h"
#include "mlir/Dialect/Linalg/Passes.h"
@@ -60,9 +60,9 @@ void buildTestLowerToLLVM(OpPassManager &pm,
pm.addPass(createCanonicalizerPass());
pm.addPass(createCSEPass());
// Convert vector to LLVM (always needed).
- pm.addPass(createConvertVectorToLLVMPass(
+ pm.addPass(createNaiveConvertVectorToLLVMPass(
// TODO: add more options on a per-need basis.
- ConvertVectorToLLVMPassOptions{options.reassociateFPReductions}));
+ NaiveConvertVectorToLLVMPassOptions{options.reassociateFPReductions}));
// Convert Math to LLVM (always needed).
pm.addNestedPass<func::FuncOp>(createConvertMathToLLVMPass());
// Expand complicated MemRef operations before lowering them.
diff --git a/mlir/test/mlir-runner/X86Vector/math-polynomial-approx-avx2.mlir b/mlir/test/mlir-runner/X86Vector/math-polynomial-approx-avx2.mlir
index e79d0b6f6f12e..63d4979101797 100644
--- a/mlir/test/mlir-runner/X86Vector/math-polynomial-approx-avx2.mlir
+++ b/mlir/test/mlir-runner/X86Vector/math-polynomial-approx-avx2.mlir
@@ -3,7 +3,7 @@
// RUN: -convert-scf-to-cf \
// RUN: -convert-arith-to-llvm \
// RUN: -convert-cf-to-llvm \
-// RUN: -convert-vector-to-llvm="enable-x86vector" \
+// RUN: -naive-convert-vector-to-llvm="enable-x86vector" \
// RUN: -convert-math-to-llvm \
// RUN: -convert-func-to-llvm \
// RUN: -reconcile-unrealized-casts \
diff --git a/mlir/test/mlir-runner/async-error.mlir b/mlir/test/mlir-runner/async-error.mlir
index e202d0a6533b3..7716b92972e50 100644
--- a/mlir/test/mlir-runner/async-error.mlir
+++ b/mlir/test/mlir-runner/async-error.mlir
@@ -1,4 +1,4 @@
-// RUN: mlir-opt %s -pass-pipeline="builtin.module(async-to-async-runtime,func.func(async-runtime-ref-counting,async-runtime-ref-counting-opt),convert-async-to-llvm,func.func(convert-linalg-to-loops,convert-scf-to-cf),convert-vector-to-llvm,func.func(convert-arith-to-llvm),convert-func-to-llvm,convert-cf-to-llvm,reconcile-unrealized-casts)" \
+// RUN: mlir-opt %s -pass-pipeline="builtin.module(async-to-async-runtime,func.func(async-runtime-ref-counting,async-runtime-ref-counting-opt),convert-async-to-llvm,func.func(convert-linalg-to-loops,convert-scf-to-cf),naive-convert-vector-to-llvm,func.func(convert-arith-to-llvm),convert-func-to-llvm,convert-cf-to-llvm,reconcile-unrealized-casts)" \
// RUN: | mlir-runner \
// RUN: -e main -entry-point-result=void -O0 \
// RUN: -shared-libs=%mlir_c_runner_utils \
diff --git a/mlir/test/mlir-runner/async-value.mlir b/mlir/test/mlir-runner/async-value.mlir
index d5251a9a9b552..4a33860112633 100644
--- a/mlir/test/mlir-runner/async-value.mlir
+++ b/mlir/test/mlir-runner/async-value.mlir
@@ -1,4 +1,4 @@
-// RUN: mlir-opt %s -pass-pipeline="builtin.module(async-to-async-runtime,func.func(async-runtime-ref-counting,async-runtime-ref-counting-opt),convert-async-to-llvm,func.func(convert-arith-to-llvm),convert-vector-to-llvm,finalize-memref-to-llvm,convert-func-to-llvm,convert-cf-to-llvm,reconcile-unrealized-casts)" \
+// RUN: mlir-opt %s -pass-pipeline="builtin.module(async-to-async-runtime,func.func(async-runtime-ref-counting,async-runtime-ref-counting-opt),convert-async-to-llvm,func.func(convert-arith-to-llvm),naive-convert-vector-to-llvm,finalize-memref-to-llvm,convert-func-to-llvm,convert-cf-to-llvm,reconcile-unrealized-casts)" \
// RUN: | mlir-runner \
// RUN: -e main -entry-point-result=void -O0 \
// RUN: -shared-libs=%mlir_c_runner_utils \
diff --git a/mlir/test/mlir-runner/expand-arith-ops.mlir b/mlir/test/mlir-runner/expand-arith-ops.mlir
index e52225f56617d..41d4775d35f57 100644
--- a/mlir/test/mlir-runner/expand-arith-ops.mlir
+++ b/mlir/test/mlir-runner/expand-arith-ops.mlir
@@ -1,4 +1,4 @@
-// RUN: mlir-opt %s -pass-pipeline="builtin.module(func.func(arith-expand{include-bf16=true},convert-arith-to-llvm),convert-vector-to-llvm,convert-func-to-llvm,reconcile-unrealized-casts)" \
+// RUN: mlir-opt %s -pass-pipeline="builtin.module(func.func(arith-expand{include-bf16=true},convert-arith-to-llvm),naive-convert-vector-to-llvm,convert-func-to-llvm,reconcile-unrealized-casts)" \
// RUN: | mlir-runner \
// RUN: -e main -entry-point-result=void -O0 \
// RUN: -shared-libs=%mlir_c_runner_utils \
diff --git a/mlir/test/mlir-runner/math-polynomial-approx.mlir b/mlir/test/mlir-runner/math-polynomial-approx.mlir
index 6ed03916f1e15..b53fefdf9df8e 100644
--- a/mlir/test/mlir-runner/math-polynomial-approx.mlir
+++ b/mlir/test/mlir-runner/math-polynomial-approx.mlir
@@ -1,4 +1,4 @@
-// RUN: mlir-opt %s -pass-pipeline="builtin.module(func.func(test-math-polynomial-approximation),convert-vector-to-scf,convert-scf-to-cf,convert-vector-to-llvm,convert-to-llvm,reconcile-unrealized-casts)" \
+// RUN: mlir-opt %s -pass-pipeline="builtin.module(func.func(test-math-polynomial-approximation),convert-vector-to-scf,convert-scf-to-cf,naive-convert-vector-to-llvm,convert-to-llvm,reconcile-unrealized-casts)" \
// RUN: | mlir-runner \
// RUN: -e main -entry-point-result=void -O0 \
// RUN: -shared-libs=%mlir_c_runner_utils \
diff --git a/mlir/test/mlir-runner/sgemm-naive-codegen.mlir b/mlir/test/mlir-runner/sgemm-naive-codegen.mlir
index 0bb2650fff2eb..dc5d90932bd96 100644
--- a/mlir/test/mlir-runner/sgemm-naive-codegen.mlir
+++ b/mlir/test/mlir-runner/sgemm-naive-codegen.mlir
@@ -1,4 +1,4 @@
-// RUN: mlir-opt -pass-pipeline="builtin.module(func.func(convert-linalg-to-loops,lower-affine,convert-scf-to-cf,convert-arith-to-llvm),convert-vector-to-llvm,finalize-memref-to-llvm,convert-func-to-llvm,convert-cf-to-llvm,reconcile-unrealized-casts)" %s | mlir-runner -O3 -e main -entry-point-result=void -shared-libs=%mlir_c_runner_utils | FileCheck %s
+// RUN: mlir-opt -pass-pipeline="builtin.module(func.func(convert-linalg-to-loops,lower-affine,convert-scf-to-cf,convert-arith-to-llvm),naive-convert-vector-to-llvm,finalize-memref-to-llvm,convert-func-to-llvm,convert-cf-to-llvm,reconcile-unrealized-casts)" %s | mlir-runner -O3 -e main -entry-point-result=void -shared-libs=%mlir_c_runner_utils | FileCheck %s
func.func @main() {
%A = memref.alloc() : memref<16x16xf32>
diff --git a/mlir/test/mlir-runner/test-expand-math-approx.mlir b/mlir/test/mlir-runner/test-expand-math-approx.mlir
index 3f9d3f2125e1a..fccdd025a5396 100644
--- a/mlir/test/mlir-runner/test-expand-math-approx.mlir
+++ b/mlir/test/mlir-runner/test-expand-math-approx.mlir
@@ -1,4 +1,4 @@
-// RUN: mlir-opt %s -pass-pipeline="builtin.module(func.func(math-expand-ops),convert-vector-to-scf,convert-scf-to-cf,convert-vector-to-llvm,convert-to-llvm,reconcile-unrealized-casts)" \
+// RUN: mlir-opt %s -pass-pipeline="builtin.module(func.func(math-expand-ops),convert-vector-to-scf,convert-scf-to-cf,naive-convert-vector-to-llvm,convert-to-llvm,reconcile-unrealized-casts)" \
// RUN: | mlir-runner \
// RUN: -e main -entry-point-result=void -O0 \
// RUN: -shared-libs=%mlir_c_runner_utils \
diff --git a/mlir/test/python/integration/dialects/linalg/opsrun.py b/mlir/test/python/integration/dialects/linalg/opsrun.py
index 8f202318146ee..ac433edd4d598 100644
--- a/mlir/test/python/integration/dialects/linalg/opsrun.py
+++ b/mlir/test/python/integration/dialects/linalg/opsrun.py
@@ -136,7 +136,7 @@ def transform(module, boilerplate):
pm.add("func.func(convert-scf-to-cf)")
pm.add("func.func(arith-expand)")
pm.add("func.func(memref-expand)")
- pm.add("convert-vector-to-llvm")
+ pm.add("naive-convert-vector-to-llvm")
pm.add("finalize-memref-to-llvm")
pm.add("convert-func-to-llvm")
pm.add("convert-arith-to-llvm")
diff --git a/mlir/unittests/ExecutionEngine/Invoke.cpp b/mlir/unittests/ExecutionEngine/Invoke.cpp
index 3161c7053f7a4..df20693865d29 100644
--- a/mlir/unittests/ExecutionEngine/Invoke.cpp
+++ b/mlir/unittests/ExecutionEngine/Invoke.cpp
@@ -10,7 +10,7 @@
#include "mlir/Conversion/FuncToLLVM/ConvertFuncToLLVMPass.h"
#include "mlir/Conversion/MemRefToLLVM/MemRefToLLVM.h"
#include "mlir/Conversion/ReconcileUnrealizedCasts/ReconcileUnrealizedCasts.h"
-#include "mlir/Conversion/VectorToLLVM/ConvertVectorToLLVM.h"
+#include "mlir/Conversion/VectorToLLVM/NaiveConvertVectorToLLVM.h"
#include "mlir/Conversion/VectorToSCF/VectorToSCF.h"
#include "mlir/Dialect/Func/IR/FuncOps.h"
#include "mlir/Dialect/Linalg/Passes.h"
>From 79e8a576b3235e658e9613791e1a9a86611a41ad Mon Sep 17 00:00:00 2001
From: Andrzej Warzynski <andrzej.warzynski at arm.com>
Date: Thu, 25 Sep 2025 19:34:57 +0000
Subject: [PATCH 2/3] Add Pass Description
---
mlir/docs/Dialects/Vector.md | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
diff --git a/mlir/docs/Dialects/Vector.md b/mlir/docs/Dialects/Vector.md
index 6c8949d70b4a3..5649b730b49ca 100644
--- a/mlir/docs/Dialects/Vector.md
+++ b/mlir/docs/Dialects/Vector.md
@@ -531,6 +531,25 @@ lowering from MLIR because:
The use of special intrinsics in a `1-D` LLVM world is still available thanks to
an explicit `vector.cast` op.
+## Key Transformations
+
+### NaiveConvertVectorToLLVM
+
+This pass primarily targets direct converting from Vector to LLVM. Higher-level
+Vector ops such as `vector.contract` may be lowered as well, but the intent is
+not to progressively lower higher-level Vector ops into lower-level Vector ops
+first. That functionality will be split into a dedicated pass.
+
+At present, the pass also contains some conversions from `Virtual Vectors`
+(Vector dialect) to `Hardware Vectors` (e.g., ArmSME, AMX). These conversions
+are temporary and will be extracted into dedicated passes.
+
+Notes
+* No target-specific optimization is attempted.
+* Useful as a baseline or fallback lowering when target-aware vector pipelines
+ are unavailable or have been disabled.
+* Expect performance trade-offs compared to hardware-tuned pipelines.
+
## Operations
[include "Dialects/VectorOps.md"]
>From a68039d0292fd7803f177f6f3149ebf514f86e8e Mon Sep 17 00:00:00 2001
From: Andrzej Warzynski <andrzej.warzynski at arm.com>
Date: Fri, 26 Sep 2025 07:08:52 +0000
Subject: [PATCH 3/3] Add missing re-name in Flang
---
flang/lib/Optimizer/CodeGen/CodeGen.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/flang/lib/Optimizer/CodeGen/CodeGen.cpp b/flang/lib/Optimizer/CodeGen/CodeGen.cpp
index 50603cb86e4a5..3fc7ea8e71736 100644
--- a/flang/lib/Optimizer/CodeGen/CodeGen.cpp
+++ b/flang/lib/Optimizer/CodeGen/CodeGen.cpp
@@ -45,7 +45,7 @@
#include "mlir/Conversion/MathToLibm/MathToLibm.h"
#include "mlir/Conversion/MathToROCDL/MathToROCDL.h"
#include "mlir/Conversion/OpenMPToLLVM/ConvertOpenMPToLLVM.h"
-#include "mlir/Conversion/VectorToLLVM/ConvertVectorToLLVM.h"
+#include "mlir/Conversion/VectorToLLVM/NaiveConvertVectorToLLVM.h"
#include "mlir/Dialect/Arith/IR/Arith.h"
#include "mlir/Dialect/DLTI/DLTI.h"
#include "mlir/Dialect/GPU/IR/GPUDialect.h"
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