[Mlir-commits] [mlir] [mlir][vector] Rename ConvertVectorToLLVM to NaiveConvertVectorToLLVM (PR #160055)

llvmlistbot at llvm.org llvmlistbot at llvm.org
Mon Sep 22 02:06:08 PDT 2025 

llvmbot wrote:


<!--LLVM PR SUMMARY COMMENT-->

@llvm/pr-subscribers-mlir-linalg

Author: Andrzej Warzyński (banach-space)

<details>
<summary>Changes</summary>

Following the discussion in the Tensor Compiler Working Group (see
https://discourse.llvm.org/t/tcdg-tensor-compiler-design-group-meeting-notes-2025-09-17),
this patch renames ConvertVectorToLLVM to NaiveConvertVectorToLLVM.

The new name better reflects the intent of the pass: it serves as a basic
reference implementation for lowering from the Vector dialect to the LLVM
dialect, without any consideration for performance. In practice, performance
tuning requires knowledge of the target architecture, which this pass
deliberately avoids.


---

Patch is 115.20 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/160055.diff


113 Files Affected:

- (modified) mlir/include/mlir/Conversion/Passes.h (+1-1) 
- (modified) mlir/include/mlir/Conversion/Passes.td (+1-1) 
- (renamed) mlir/include/mlir/Conversion/VectorToLLVM/NaiveConvertVectorToLLVM.h (+3-3) 
- (renamed) mlir/include/mlir/Conversion/VectorToLLVM/NaiveConvertVectorToLLVMPass.h (+5-5) 
- (modified) mlir/include/mlir/Dialect/SparseTensor/Pipelines/Passes.h (+3-3) 
- (modified) mlir/lib/Conversion/GPUCommon/GPUToLLVMConversion.cpp (+1-1) 
- (modified) mlir/lib/Conversion/VectorToLLVM/CMakeLists.txt (+2-2) 
- (renamed) mlir/lib/Conversion/VectorToLLVM/NaiveConvertVectorToLLVM.cpp (+4-2) 
- (renamed) mlir/lib/Conversion/VectorToLLVM/NaiveConvertVectorToLLVMPass.cpp (+10-6) 
- (modified) mlir/lib/Dialect/SparseTensor/Pipelines/SparseTensorPipelines.cpp (+2-2) 
- (modified) mlir/lib/Dialect/Vector/TransformOps/VectorTransformOps.cpp (+1-1) 
- (modified) mlir/lib/RegisterAllExtensions.cpp (+1-1) 
- (modified) mlir/test/Conversion/VectorToLLVM/pass-option-serialization.mlir (+5-5) 
- (modified) mlir/test/Conversion/VectorToLLVM/use-vector-alignment.mlir (+2-2) 
- (modified) mlir/test/Conversion/VectorToLLVM/vector-mask-to-llvm.mlir (+2-2) 
- (modified) mlir/test/Conversion/VectorToLLVM/vector-reduction-to-llvm.mlir (+2-2) 
- (modified) mlir/test/Conversion/VectorToLLVM/vector-scalable-memcpy.mlir (+1-1) 
- (modified) mlir/test/Conversion/VectorToLLVM/vector-to-llvm-interface.mlir (+1-1) 
- (modified) mlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir (+1-1) 
- (modified) mlir/test/Conversion/VectorToLLVM/vector-xfer-to-llvm.mlir (+2-2) 
- (modified) mlir/test/Dialect/AMX/legalize-for-llvm.mlir (+1-1) 
- (modified) mlir/test/Dialect/AMX/side-effects.mlir (+1-1) 
- (modified) mlir/test/Dialect/ArmSVE/legalize-for-llvm.mlir (+1-1) 
- (modified) mlir/test/Dialect/Vector/vector-contract-to-matrix-intrinsics-transforms.mlir (+1-1) 
- (modified) mlir/test/Dialect/Vector/vector-transpose-to-matrix-intrinsics-transform.mlir (+1-1) 
- (modified) mlir/test/Dialect/X86Vector/cvt-packed-f32-to-bf16.mlir (+1-1) 
- (modified) mlir/test/Dialect/X86Vector/dot-bf16.mlir (+1-1) 
- (modified) mlir/test/Dialect/X86Vector/legalize-for-llvm.mlir (+1-1) 
- (modified) mlir/test/Integration/Dialect/Arith/CPU/test-arith-expand-ceildivsi.mlir (+1-1) 
- (modified) mlir/test/Integration/Dialect/Arith/CPU/test-arith-expand-truncf-extf.mlir (+1-1) 
- (modified) mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-addi-i16.mlir (+2-2) 
- (modified) mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-cmpi-i16.mlir (+2-2) 
- (modified) mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-compare-results-i16.mlir (+1-1) 
- (modified) mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-constants-i16.mlir (+1-1) 
- (modified) mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-fptosi-i64.mlir (+2-2) 
- (modified) mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-fptoui-i64.mlir (+2-2) 
- (modified) mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-max-min-i16.mlir (+2-2) 
- (modified) mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-muli-i16.mlir (+2-2) 
- (modified) mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-shli-i16.mlir (+2-2) 
- (modified) mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-shrsi-i16.mlir (+2-2) 
- (modified) mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-shrui-i16.mlir (+2-2) 
- (modified) mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-sitofp-i32.mlir (+2-2) 
- (modified) mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-subi-i32.mlir (+2-2) 
- (modified) mlir/test/Integration/Dialect/Arith/CPU/test-wide-int-emulation-uitofp-i32.mlir (+2-2) 
- (modified) mlir/test/Integration/Dialect/Async/CPU/microbench-linalg-async-parallel-for.mlir (+2-2) 
- (modified) mlir/test/Integration/Dialect/Async/CPU/microbench-scf-async-parallel-for.mlir (+3-3) 
- (modified) mlir/test/Integration/Dialect/Complex/CPU/correctness.mlir (+1-1) 
- (modified) mlir/test/Integration/Dialect/LLVMIR/CPU/X86/test-inline-asm-vector.mlir (+1-1) 
- (modified) mlir/test/Integration/Dialect/LLVMIR/CPU/test-vp-intrinsic.mlir (+1-1) 
- (modified) mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/multi-tile-matmul-mixed-types.mlir (+1-1) 
- (modified) mlir/test/Integration/Dialect/Linalg/CPU/ArmSME/multi-tile-matmul.mlir (+1-1) 
- (modified) mlir/test/Integration/Dialect/Linalg/CPU/ArmSVE/1d-depthwise-conv.mlir (+1-1) 
- (modified) mlir/test/Integration/Dialect/Linalg/CPU/ArmSVE/matmul.mlir (+1-1) 
- (modified) mlir/test/Integration/Dialect/Linalg/CPU/ArmSVE/pack-scalable-inner-tile.mlir (+1-1) 
- (modified) mlir/test/Integration/Dialect/Linalg/CPU/ArmSVE/pack-unpack-scalable-inner-tile.mlir (+1-1) 
- (modified) mlir/test/Integration/Dialect/Linalg/CPU/ArmSVE/reduce_1d.mlir (+1-1) 
- (modified) mlir/test/Integration/Dialect/Linalg/CPU/ArmSVE/reduce_2d.mlir (+1-1) 
- (modified) mlir/test/Integration/Dialect/Linalg/CPU/test-one-shot-bufferize.mlir (+1-1) 
- (modified) mlir/test/Integration/Dialect/MemRef/verify-memref.mlir (+1-1) 
- (modified) mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/sm80-lt/sparse-matmul-2-4-hand.mlir (+1-1) 
- (modified) mlir/test/Integration/Dialect/SparseTensor/GPU/CUDA/sparse-mma-2-4-f16.mlir (+1-1) 
- (modified) mlir/test/Integration/Dialect/Standard/CPU/test-ceil-floor-pos-neg.mlir (+2-2) 
- (modified) mlir/test/Integration/Dialect/Vector/CPU/AMX/mulf-full.mlir (+1-1) 
- (modified) mlir/test/Integration/Dialect/Vector/CPU/AMX/mulf.mlir (+1-1) 
- (modified) mlir/test/Integration/Dialect/Vector/CPU/AMX/muli-ext.mlir (+1-1) 
- (modified) mlir/test/Integration/Dialect/Vector/CPU/AMX/muli-full.mlir (+1-1) 
- (modified) mlir/test/Integration/Dialect/Vector/CPU/AMX/muli.mlir (+1-1) 
- (modified) mlir/test/Integration/Dialect/Vector/CPU/AMX/tilezero-block.mlir (+1-1) 
- (modified) mlir/test/Integration/Dialect/Vector/CPU/AMX/tilezero.mlir (+1-1) 
- (modified) mlir/test/Integration/Dialect/Vector/CPU/ArmNeon/vector-contract-bfmmla.mlir (+1-1) 
- (modified) mlir/test/Integration/Dialect/Vector/CPU/ArmNeon/vector-contract-i8mm.mlir (+1-1) 
- (modified) mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/arrays-of-scalable-vectors.mlir (+1-1) 
- (modified) mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/contraction.mlir (+1-1) 
- (modified) mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/sve.mlir (+1-1) 
- (modified) mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/transfer-read-scalable-non-trailing.mlir (+1-1) 
- (modified) mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/vector-contract-bfmmla.mlir (+1-1) 
- (modified) mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/vector-contract-i8mm.mlir (+1-1) 
- (modified) mlir/test/Integration/Dialect/Vector/CPU/X86Vector/dot.mlir (+1-1) 
- (modified) mlir/test/Integration/Dialect/Vector/CPU/X86Vector/mask-compress.mlir (+1-1) 
- (modified) mlir/test/Integration/Dialect/Vector/CPU/X86Vector/rsqrt.mlir (+1-1) 
- (modified) mlir/test/Integration/Dialect/Vector/CPU/X86Vector/sparse-dot-product.mlir (+1-1) 
- (modified) mlir/test/Integration/Dialect/Vector/CPU/X86Vector/vp2intersect-i32.mlir (+1-1) 
- (modified) mlir/test/Integration/Dialect/Vector/CPU/realloc.mlir (+2-2) 
- (modified) mlir/test/Integration/Dialect/Vector/CPU/reductions-f32-reassoc.mlir (+1-1) 
- (modified) mlir/test/Integration/Dialect/Vector/CPU/reductions-f64-reassoc.mlir (+1-1) 
- (modified) mlir/test/Integration/Dialect/Vector/CPU/shuffle16x16.mlir (+1-1) 
- (modified) mlir/test/Integration/Dialect/Vector/CPU/transfer-read-1d.mlir (+2-2) 
- (modified) mlir/test/Integration/Dialect/Vector/CPU/transfer-read-2d.mlir (+2-2) 
- (modified) mlir/test/Integration/Dialect/Vector/CPU/transfer-read-3d.mlir (+2-2) 
- (modified) mlir/test/Integration/Dialect/Vector/CPU/transfer-read.mlir (+2-2) 
- (modified) mlir/test/Integration/Dialect/Vector/CPU/transfer-to-loops.mlir (+2-2) 
- (modified) mlir/test/Integration/Dialect/Vector/GPU/CUDA/test-reduction-distribute.mlir (+1-1) 
- (modified) mlir/test/Integration/Dialect/Vector/GPU/CUDA/test-warp-distribute.mlir (+3-3) 
- (modified) mlir/test/Integration/Dialect/XeVM/GPU/xevm_block_dpas.mlir (+1-1) 
- (modified) mlir/test/Integration/Dialect/XeVM/GPU/xevm_block_load_store.mlir (+1-1) 
- (modified) mlir/test/Integration/Dialect/XeVM/GPU/xevm_block_load_store_pack_register.mlir (+1-1) 
- (modified) mlir/test/Integration/Dialect/XeVM/GPU/xevm_block_load_store_transpose.mlir (+1-1) 
- (modified) mlir/test/Integration/Dialect/XeVM/GPU/xevm_store_cst.mlir (+1-1) 
- (modified) mlir/test/Integration/GPU/CUDA/sm90/tma_load_64x8_8x128_noswizzle.mlir (+1-1) 
- (modified) mlir/test/Integration/GPU/CUDA/sm90/transform-dialect/tma_load_64x8_8x128_noswizzle-transform.mlir (+2-2) 
- (modified) mlir/test/Target/LLVMIR/amx.mlir (+1-1) 
- (modified) mlir/test/Target/LLVMIR/vector-to-llvm-ir.mlir (+1-1) 
- (modified) mlir/test/Target/LLVMIR/x86vector.mlir (+1-1) 
- (modified) mlir/test/lib/Dialect/LLVM/TestLowerToLLVM.cpp (+3-3) 
- (modified) mlir/test/mlir-runner/X86Vector/math-polynomial-approx-avx2.mlir (+1-1) 
- (modified) mlir/test/mlir-runner/async-error.mlir (+1-1) 
- (modified) mlir/test/mlir-runner/async-value.mlir (+1-1) 
- (modified) mlir/test/mlir-runner/expand-arith-ops.mlir (+1-1) 
- (modified) mlir/test/mlir-runner/math-polynomial-approx.mlir (+1-1) 
- (modified) mlir/test/mlir-runner/sgemm-naive-codegen.mlir (+1-1) 
- (modified) mlir/test/mlir-runner/test-expand-math-approx.mlir (+1-1) 
- (modified) mlir/test/python/integration/dialects/linalg/opsrun.py (+1-1) 
- (modified) mlir/unittests/ExecutionEngine/Invoke.cpp (+1-1) 


``````````diff
diff --git a/mlir/include/mlir/Conversion/Passes.h b/mlir/include/mlir/Conversion/Passes.h
index da061b269daf7..cc247ac424ee0 100644
--- a/mlir/include/mlir/Conversion/Passes.h
+++ b/mlir/include/mlir/Conversion/Passes.h
@@ -78,7 +78,7 @@
 #include "mlir/Conversion/VectorToAMX/VectorToAMX.h"
 #include "mlir/Conversion/VectorToArmSME/VectorToArmSME.h"
 #include "mlir/Conversion/VectorToGPU/VectorToGPU.h"
-#include "mlir/Conversion/VectorToLLVM/ConvertVectorToLLVMPass.h"
+#include "mlir/Conversion/VectorToLLVM/NaiveConvertVectorToLLVMPass.h"
 #include "mlir/Conversion/VectorToSCF/VectorToSCF.h"
 #include "mlir/Conversion/VectorToSPIRV/VectorToSPIRVPass.h"
 #include "mlir/Conversion/VectorToXeGPU/VectorToXeGPU.h"
diff --git a/mlir/include/mlir/Conversion/Passes.td b/mlir/include/mlir/Conversion/Passes.td
index 1a37d057776e2..fd1656956dfab 100644
--- a/mlir/include/mlir/Conversion/Passes.td
+++ b/mlir/include/mlir/Conversion/Passes.td
@@ -1427,7 +1427,7 @@ def ConvertArmSMEToLLVM : InterfacePass<"convert-arm-sme-to-llvm", "FunctionOpIn
 // VectorToLLVM
 //===----------------------------------------------------------------------===//
 
-def ConvertVectorToLLVMPass : Pass<"convert-vector-to-llvm"> {
+def NaiveConvertVectorToLLVMPass : Pass<"naive-convert-vector-to-llvm"> {
   let summary = "Lower the operations from the vector dialect into the LLVM "
                 "dialect";
   let description = [{
diff --git a/mlir/include/mlir/Conversion/VectorToLLVM/ConvertVectorToLLVM.h b/mlir/include/mlir/Conversion/VectorToLLVM/NaiveConvertVectorToLLVM.h
similarity index 81%
rename from mlir/include/mlir/Conversion/VectorToLLVM/ConvertVectorToLLVM.h
rename to mlir/include/mlir/Conversion/VectorToLLVM/NaiveConvertVectorToLLVM.h
index cfb6cc313bc63..1e700e880dbd0 100644
--- a/mlir/include/mlir/Conversion/VectorToLLVM/ConvertVectorToLLVM.h
+++ b/mlir/include/mlir/Conversion/VectorToLLVM/NaiveConvertVectorToLLVM.h
@@ -5,8 +5,8 @@
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
-#ifndef MLIR_CONVERSION_VECTORTOLLVM_CONVERTVECTORTOLLVM_H_
-#define MLIR_CONVERSION_VECTORTOLLVM_CONVERTVECTORTOLLVM_H_
+#ifndef MLIR_CONVERSION_VECTORTOLLVM_NAIVECONVERTVECTORTOLLVM_H_
+#define MLIR_CONVERSION_VECTORTOLLVM_NAIVECONVERTVECTORTOLLVM_H_
 
 #include "mlir/Transforms/DialectConversion.h"
 
@@ -24,4 +24,4 @@ void registerConvertVectorToLLVMInterface(DialectRegistry &registry);
 }
 } // namespace mlir
 
-#endif // MLIR_CONVERSION_VECTORTOLLVM_CONVERTVECTORTOLLVM_H_
+#endif // MLIR_CONVERSION_VECTORTOLLVM_NAIVECONVERTVECTORTOLLVM_H_
diff --git a/mlir/include/mlir/Conversion/VectorToLLVM/ConvertVectorToLLVMPass.h b/mlir/include/mlir/Conversion/VectorToLLVM/NaiveConvertVectorToLLVMPass.h
similarity index 61%
rename from mlir/include/mlir/Conversion/VectorToLLVM/ConvertVectorToLLVMPass.h
rename to mlir/include/mlir/Conversion/VectorToLLVM/NaiveConvertVectorToLLVMPass.h
index 410b881db7959..395104498293d 100644
--- a/mlir/include/mlir/Conversion/VectorToLLVM/ConvertVectorToLLVMPass.h
+++ b/mlir/include/mlir/Conversion/VectorToLLVM/NaiveConvertVectorToLLVMPass.h
@@ -5,16 +5,16 @@
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
-#ifndef MLIR_CONVERSION_VECTORTOLLVM_CONVERTVECTORTOLLVMPASS_H_
-#define MLIR_CONVERSION_VECTORTOLLVM_CONVERTVECTORTOLLVMPASS_H_
+#ifndef MLIR_CONVERSION_VECTORTOLLVM_NAIVECONVERTVECTORTOLLVMPASS_H_
+#define MLIR_CONVERSION_VECTORTOLLVM_NAIVECONVERTVECTORTOLLVMPASS_H_
 
-#include "mlir/Conversion/VectorToLLVM/ConvertVectorToLLVM.h"
+#include "mlir/Conversion/VectorToLLVM/NaiveConvertVectorToLLVM.h"
 #include "mlir/Dialect/Vector/Transforms/VectorTransforms.h"
 
 namespace mlir {
 class Pass;
 
-#define GEN_PASS_DECL_CONVERTVECTORTOLLVMPASS
+#define GEN_PASS_DECL_NAIVECONVERTVECTORTOLLVMPASS
 #include "mlir/Conversion/Passes.h.inc"
 } // namespace mlir
-#endif // MLIR_CONVERSION_VECTORTOLLVM_CONVERTVECTORTOLLVMPASS_H_
+#endif // MLIR_CONVERSION_VECTORTOLLVM_NAIVECONVERTVECTORTOLLVMPASS_H_
diff --git a/mlir/include/mlir/Dialect/SparseTensor/Pipelines/Passes.h b/mlir/include/mlir/Dialect/SparseTensor/Pipelines/Passes.h
index efbe5c56a219b..ac5c3fa281383 100644
--- a/mlir/include/mlir/Dialect/SparseTensor/Pipelines/Passes.h
+++ b/mlir/include/mlir/Dialect/SparseTensor/Pipelines/Passes.h
@@ -13,7 +13,7 @@
 #ifndef MLIR_DIALECT_SPARSETENSOR_PIPELINES_PASSES_H_
 #define MLIR_DIALECT_SPARSETENSOR_PIPELINES_PASSES_H_
 
-#include "mlir/Conversion/VectorToLLVM/ConvertVectorToLLVMPass.h"
+#include "mlir/Conversion/VectorToLLVM/NaiveConvertVectorToLLVMPass.h"
 #include "mlir/Dialect/SparseTensor/Transforms/Passes.h"
 #include "mlir/Pass/PassOptions.h"
 
@@ -162,8 +162,8 @@ struct SparsifierOptions : public PassPipelineOptions<SparsifierOptions> {
   }
 
   /// Projects out the options for `createConvertVectorToLLVMPass`.
-  ConvertVectorToLLVMPassOptions convertVectorToLLVMOptions() const {
-    ConvertVectorToLLVMPassOptions opts{};
+  NaiveConvertVectorToLLVMPassOptions convertVectorToLLVMOptions() const {
+    NaiveConvertVectorToLLVMPassOptions opts{};
     opts.reassociateFPReductions = reassociateFPReductions;
     opts.force32BitVectorIndices = force32BitVectorIndices;
     opts.armNeon = armNeon;
diff --git a/mlir/lib/Conversion/GPUCommon/GPUToLLVMConversion.cpp b/mlir/lib/Conversion/GPUCommon/GPUToLLVMConversion.cpp
index e516118f75207..b946844f0070d 100644
--- a/mlir/lib/Conversion/GPUCommon/GPUToLLVMConversion.cpp
+++ b/mlir/lib/Conversion/GPUCommon/GPUToLLVMConversion.cpp
@@ -24,7 +24,7 @@
 #include "mlir/Conversion/GPUCommon/GPUToLLVM.h"
 #include "mlir/Conversion/LLVMCommon/Pattern.h"
 #include "mlir/Conversion/MemRefToLLVM/MemRefToLLVM.h"
-#include "mlir/Conversion/VectorToLLVM/ConvertVectorToLLVM.h"
+#include "mlir/Conversion/VectorToLLVM/NaiveConvertVectorToLLVM.h"
 #include "mlir/Dialect/Async/IR/Async.h"
 #include "mlir/Dialect/GPU/IR/GPUDialect.h"
 #include "mlir/Dialect/GPU/Transforms/Passes.h"
diff --git a/mlir/lib/Conversion/VectorToLLVM/CMakeLists.txt b/mlir/lib/Conversion/VectorToLLVM/CMakeLists.txt
index 8e2620029c354..1106799cf6904 100644
--- a/mlir/lib/Conversion/VectorToLLVM/CMakeLists.txt
+++ b/mlir/lib/Conversion/VectorToLLVM/CMakeLists.txt
@@ -1,6 +1,6 @@
 add_mlir_conversion_library(MLIRVectorToLLVM
   PARTIAL_SOURCES_INTENDED
-  ConvertVectorToLLVM.cpp
+  NaiveConvertVectorToLLVM.cpp
 
   ADDITIONAL_HEADER_DIRS
   ${MLIR_MAIN_INCLUDE_DIR}/mlir/Conversion/VectorToLLVM
@@ -27,7 +27,7 @@ add_mlir_conversion_library(MLIRVectorToLLVM
 add_mlir_conversion_library(MLIRVectorToLLVMPass
   PARTIAL_SOURCES_INTENDED
 
-  ConvertVectorToLLVMPass.cpp
+  NaiveConvertVectorToLLVMPass.cpp
   ADDITIONAL_HEADER_DIRS
   ${MLIR_MAIN_INCLUDE_DIR}/mlir/Conversion/VectorToLLVM
 
diff --git a/mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp b/mlir/lib/Conversion/VectorToLLVM/NaiveConvertVectorToLLVM.cpp
similarity index 99%
rename from mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp
rename to mlir/lib/Conversion/VectorToLLVM/NaiveConvertVectorToLLVM.cpp
index e7266740894b1..339227bd49393 100644
--- a/mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp
+++ b/mlir/lib/Conversion/VectorToLLVM/NaiveConvertVectorToLLVM.cpp
@@ -1,12 +1,14 @@
-//===- VectorToLLVM.cpp - Conversion from Vector to the LLVM dialect ------===//
+//===- VectorToLLVM.cpp ---------------------------------------------------===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
+// (Naive) Conversion from Vector to the LLVM dialect
+//===----------------------------------------------------------------------===//
 
-#include "mlir/Conversion/VectorToLLVM/ConvertVectorToLLVM.h"
+#include "mlir/Conversion/VectorToLLVM/NaiveConvertVectorToLLVM.h"
 
 #include "mlir/Conversion/ArithCommon/AttrToLLVMConverter.h"
 #include "mlir/Conversion/ConvertToLLVM/ToLLVMInterface.h"
diff --git a/mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVMPass.cpp b/mlir/lib/Conversion/VectorToLLVM/NaiveConvertVectorToLLVMPass.cpp
similarity index 91%
rename from mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVMPass.cpp
rename to mlir/lib/Conversion/VectorToLLVM/NaiveConvertVectorToLLVMPass.cpp
index 0b44ca7ceee42..ba2875acf6d5c 100644
--- a/mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVMPass.cpp
+++ b/mlir/lib/Conversion/VectorToLLVM/NaiveConvertVectorToLLVMPass.cpp
@@ -1,12 +1,15 @@
-//===- VectorToLLVM.cpp - Conversion from Vector to the LLVM dialect ------===//
+//===- NaiveConverVectorToLLVM.cpp
+//-----------------------------------------===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
+// (Naive) Conversion from Vector to the LLVM dialect
+//===----------------------------------------------------------------------===//
 
-#include "mlir/Conversion/VectorToLLVM/ConvertVectorToLLVMPass.h"
+#include "mlir/Conversion/VectorToLLVM/NaiveConvertVectorToLLVMPass.h"
 
 #include "mlir/Conversion/LLVMCommon/ConversionTarget.h"
 #include "mlir/Conversion/LLVMCommon/TypeConverter.h"
@@ -28,7 +31,7 @@
 #include "mlir/Transforms/GreedyPatternRewriteDriver.h"
 
 namespace mlir {
-#define GEN_PASS_DEF_CONVERTVECTORTOLLVMPASS
+#define GEN_PASS_DEF_NAIVECONVERTVECTORTOLLVMPASS
 #include "mlir/Conversion/Passes.h.inc"
 } // namespace mlir
 
@@ -36,8 +39,9 @@ using namespace mlir;
 using namespace mlir::vector;
 
 namespace {
-struct ConvertVectorToLLVMPass
-    : public impl::ConvertVectorToLLVMPassBase<ConvertVectorToLLVMPass> {
+struct NaiveConvertVectorToLLVMPass
+    : public impl::NaiveConvertVectorToLLVMPassBase<
+          NaiveConvertVectorToLLVMPass> {
 
   using Base::Base;
 
@@ -60,7 +64,7 @@ struct ConvertVectorToLLVMPass
 };
 } // namespace
 
-void ConvertVectorToLLVMPass::runOnOperation() {
+void NaiveConvertVectorToLLVMPass::runOnOperation() {
   // Perform progressive lowering of operations on slices and all contraction
   // operations. Also materializes masks, lowers vector.step, rank-reduces FMA,
   // applies folding and DCE.
diff --git a/mlir/lib/Dialect/SparseTensor/Pipelines/SparseTensorPipelines.cpp b/mlir/lib/Dialect/SparseTensor/Pipelines/SparseTensorPipelines.cpp
index dabbea1bdec63..37f050390c492 100644
--- a/mlir/lib/Dialect/SparseTensor/Pipelines/SparseTensorPipelines.cpp
+++ b/mlir/lib/Dialect/SparseTensor/Pipelines/SparseTensorPipelines.cpp
@@ -70,14 +70,14 @@ void mlir::sparse_tensor::buildSparsifier(OpPassManager &pm,
   pm.addPass(memref::createExpandStridedMetadataPass());
   pm.addPass(createLowerAffinePass());
   pm.addPass(
-      createConvertVectorToLLVMPass(options.convertVectorToLLVMOptions()));
+      createNaiveConvertVectorToLLVMPass(options.convertVectorToLLVMOptions()));
   pm.addNestedPass<func::FuncOp>(createConvertComplexToStandardPass());
   pm.addNestedPass<func::FuncOp>(arith::createArithExpandOpsPass());
   pm.addNestedPass<func::FuncOp>(createConvertMathToLLVMPass());
   pm.addPass(createConvertMathToLibmPass());
   pm.addPass(createConvertComplexToLibm());
   pm.addPass(
-      createConvertVectorToLLVMPass(options.convertVectorToLLVMOptions()));
+      createNaiveConvertVectorToLLVMPass(options.convertVectorToLLVMOptions()));
 
   // Finalize GPU code generation.
   if (gpuCodegen) {
diff --git a/mlir/lib/Dialect/Vector/TransformOps/VectorTransformOps.cpp b/mlir/lib/Dialect/Vector/TransformOps/VectorTransformOps.cpp
index 18f105ef62e38..b471b38cc9c3a 100644
--- a/mlir/lib/Dialect/Vector/TransformOps/VectorTransformOps.cpp
+++ b/mlir/lib/Dialect/Vector/TransformOps/VectorTransformOps.cpp
@@ -9,7 +9,7 @@
 #include "mlir/Dialect/Vector/TransformOps/VectorTransformOps.h"
 
 #include "mlir/Conversion/LLVMCommon/TypeConverter.h"
-#include "mlir/Conversion/VectorToLLVM/ConvertVectorToLLVM.h"
+#include "mlir/Conversion/VectorToLLVM/NaiveConvertVectorToLLVM.h"
 #include "mlir/Conversion/VectorToSCF/VectorToSCF.h"
 #include "mlir/Dialect/LLVMIR/LLVMDialect.h"
 #include "mlir/Dialect/Transform/IR/TransformDialect.h"
diff --git a/mlir/lib/RegisterAllExtensions.cpp b/mlir/lib/RegisterAllExtensions.cpp
index 69a85dbe141ce..4ca27f0305460 100644
--- a/mlir/lib/RegisterAllExtensions.cpp
+++ b/mlir/lib/RegisterAllExtensions.cpp
@@ -31,7 +31,7 @@
 #include "mlir/Conversion/PtrToLLVM/PtrToLLVM.h"
 #include "mlir/Conversion/SCFToEmitC/SCFToEmitC.h"
 #include "mlir/Conversion/UBToLLVM/UBToLLVM.h"
-#include "mlir/Conversion/VectorToLLVM/ConvertVectorToLLVM.h"
+#include "mlir/Conversion/VectorToLLVM/NaiveConvertVectorToLLVM.h"
 #include "mlir/Conversion/XeVMToLLVM/XeVMToLLVM.h"
 #include "mlir/Dialect/AMX/Transforms.h"
 #include "mlir/Dialect/Affine/TransformOps/AffineTransformOps.h"
diff --git a/mlir/test/Conversion/VectorToLLVM/pass-option-serialization.mlir b/mlir/test/Conversion/VectorToLLVM/pass-option-serialization.mlir
index 323d86ac40988..7f43604a7e08c 100644
--- a/mlir/test/Conversion/VectorToLLVM/pass-option-serialization.mlir
+++ b/mlir/test/Conversion/VectorToLLVM/pass-option-serialization.mlir
@@ -2,8 +2,8 @@
 
 // This test also allows us to exercise these options (to some extent) even if we
 // don't use them in other Vector to LLVM conversion tests. This is quite relevant
-// for the `Vector` Dialect (and `--convert-vector-to-llvm` pass) as in many cases
-// we use the Transform Dialect (TD) rather than `--convert-vector-to-llvm` for
+// for the `Vector` Dialect (and `--naive-convert-vector-to-llvm` pass) as in many cases
+// we use the Transform Dialect (TD) rather than `--naive-convert-vector-to-llvm` for
 // testing. So here we don't check the correctness of the passes, as they're
 // covered by other tests that use TD, but we still provide some test coverage of
 // these pass options.
@@ -11,13 +11,13 @@
 // We don't need to actually parse any IR to print the pass options. We just need
 // to provide --dump-pass-pipeline
 
-// RUN: mlir-opt --convert-vector-to-llvm --dump-pass-pipeline %s 2>&1 | FileCheck %s --check-prefix=DEFAULT
+// RUN: mlir-opt --naive-convert-vector-to-llvm --dump-pass-pipeline %s 2>&1 | FileCheck %s --check-prefix=DEFAULT
 
-// RUN: mlir-opt --convert-vector-to-llvm='vector-contract-lowering=matmul vector-transpose-lowering=flat' \
+// RUN: mlir-opt --naive-convert-vector-to-llvm='vector-contract-lowering=matmul vector-transpose-lowering=flat' \
 // RUN:          --dump-pass-pipeline %s 2>&1 | FileCheck %s --check-prefix=NON-DEFAULT
 
 // CHECK: builtin.module(
-// CHECK-SAME: convert-vector-to-llvm{
+// CHECK-SAME: naive-convert-vector-to-llvm{
 // CHECK-SAME: enable-amx={{[aA-zZ0-9]+}}
 // CHECK-SAME: enable-arm-neon={{[aA-zZ0-9]+}}
 // CHECK-SAME: enable-arm-sve={{[aA-zZ0-9]+}}
diff --git a/mlir/test/Conversion/VectorToLLVM/use-vector-alignment.mlir b/mlir/test/Conversion/VectorToLLVM/use-vector-alignment.mlir
index 12fe3552ce1b7..80100541f164e 100644
--- a/mlir/test/Conversion/VectorToLLVM/use-vector-alignment.mlir
+++ b/mlir/test/Conversion/VectorToLLVM/use-vector-alignment.mlir
@@ -1,5 +1,5 @@
-// RUN: mlir-opt %s --convert-vector-to-llvm='use-vector-alignment=0' --split-input-file | FileCheck %s --check-prefix=MEMREF-ALIGN
-// RUN: mlir-opt %s --convert-vector-to-llvm='use-vector-alignment=1' --split-input-file | FileCheck %s --check-prefix=VEC-ALIGN
+// RUN: mlir-opt %s --naive-convert-vector-to-llvm='use-vector-alignment=0' --split-input-file | FileCheck %s --check-prefix=MEMREF-ALIGN
+// RUN: mlir-opt %s --naive-convert-vector-to-llvm='use-vector-alignment=1' --split-input-file | FileCheck %s --check-prefix=VEC-ALIGN
 
 
 //===----------------------------------------------------------------------===//
diff --git a/mlir/test/Conversion/VectorToLLVM/vector-mask-to-llvm.mlir b/mlir/test/Conversion/VectorToLLVM/vector-mask-to-llvm.mlir
index 91e5358622b69..8eea6ff6a312e 100644
--- a/mlir/test/Conversion/VectorToLLVM/vector-mask-to-llvm.mlir
+++ b/mlir/test/Conversion/VectorToLLVM/vector-mask-to-llvm.mlir
@@ -1,5 +1,5 @@
-// RUN: mlir-opt %s --convert-vector-to-llvm='force-32bit-vector-indices=1' | FileCheck %s --check-prefix=CMP32
-// RUN: mlir-opt %s --convert-vector-to-llvm='force-32bit-vector-indices=0' | FileCheck %s --check-prefix=CMP64
+// RUN: mlir-opt %s --naive-convert-vector-to-llvm='force-32bit-vector-indices=1' | FileCheck %s --check-prefix=CMP32
+// RUN: mlir-opt %s --naive-convert-vector-to-llvm='force-32bit-vector-indices=0' | FileCheck %s --check-prefix=CMP64
 
 // CMP32-LABEL: @genbool_var_1d(
 // CMP32-SAME: %[[ARG:.*]]: index)
diff --git a/mlir/test/Conversion/VectorToLLVM/vector-reduction-to-llvm.mlir b/mlir/test/Conversion/VectorToLLVM/vector-reduction-to-llvm.mlir
index c7d9e22fb2423..0dc7d101648a2 100644
--- a/mlir/test/Conversion/VectorToLLVM/vector-reduction-to-llvm.mlir
+++ b/mlir/test/Conversion/VectorToLLVM/vector-reduction-to-llvm.mlir
@@ -1,5 +1,5 @@
-// RUN: mlir-opt %s -convert-vector-to-llvm -split-input-file | FileCheck %s
-// RUN: mlir-opt %s -convert-vector-to-llvm='reassociate-fp-reductions' -split-input-file | FileCheck %s --check-prefix=REASSOC
+// RUN: mlir-opt %s -naive-convert-vector-to-llvm -split-input-file | FileCheck %s
+// RUN: mlir-opt %s -naive-convert-vector-to-llvm='reassociate-fp-reductions' -split-input-file | FileCheck %s --check-prefix=REASSOC
 
 // CHECK-LABEL: @reduce_add_f32(
 // CHECK-SAME: %[[A:.*]]: vector<16xf32>)
diff --git a/mlir/test/Conversion/VectorToLLVM/vector-scalable-memcpy.mlir b/mlir/test/Conversion/VectorToLLVM/vector-scalable-memcpy.mlir
index 80e6caa05db5e..b24b1c72f8a1f 100644
--- a/mlir/test/Conversion/VectorToLLVM/vector-scalable-memcpy.mlir
+++ b/mlir/test/Conversion/VectorToLLVM/vector-scalable-memcpy.mlir
@@ -1,4 +1,4 @@
-// RUN: mlir-opt %s -convert-vector-to-llvm | mlir-opt | FileCheck %s
+// RUN: mlir-opt %s -naive-convert-vector-to-llvm | mlir-opt | FileCheck %s
 
 // CHECK: vector_scalable_memcopy([[SRC:%arg[0-9]+]]: memref<?xf32>, [[DST:%arg[0-9]+]]
 func.func @vector_scalable_memcopy(%src : memref<?xf32>, %dst : memref<?xf32>, %size : index) {
diff --git a/mlir/test/Conversion/VectorToLLVM/vector-to-llvm-interface.mlir b/mlir/test/Conversion/VectorToLLVM/vector-to-llvm-interface.mlir
index 5973c2ba2cbd0..2e73aa8d066e0 100644
--- a/mlir/test/Conversion/VectorToLLVM/vector-to-llvm-interface.mlir
+++ b/mlir/test/Conversion/VectorToLLVM/vector-to-llvm-interface.mlir
@@ -1,6 +1,6 @@
 // RUN: mlir-opt --convert-to-llvm="filter-dialects=vector" --split-input-file %s | FileCheck %s
 // RUN: mlir-opt --convert-to-llvm="filter-dialects=vector allow-pattern-rollback=0" --split-input-file %s | FileCheck %s
-// RUN: mlir-opt %s -convert-vector-to-llvm -split-input-file | FileCheck %s
+// RUN: mlir-opt %s -naive-convert-vector-to-llvm -split-input-file | FileCheck %s
 
 //===========================================================================//
 // Basic tests for Vector-to-LLVM conversion
diff --git a/mlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir b/mlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir
index 2d33888854ea7..816e4c4ddb8d5 100644
--- a/mlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir
+++ b/mlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir
@@ -1,4 +1,4 @@
-// RUN: mlir-opt %s -convert-vector-to-llvm -split-input-file | FileCheck %s
+// RUN: mlir-opt %s -naive-convert-vector-to-llvm -split-input-file | FileCheck %s
 
 //===========================================================================//
 // Complex tests for Vector-to-LLVM conversion
diff --git a/mlir/test/Conversion/VectorToLLVM/vector-xfer-to-llvm.mlir b/mlir/test/Conversion/VectorToLLVM/vector-xfer-to-llvm.mlir
index d3f6d7eca90b4..ca3224525bbe5 100644
--- a/mlir/test/Conversion/VectorToLLVM/vector-xfer-to-llvm.mlir
+++ b/mlir/test/Conversion/VectorToLLVM/vector-xfer-to-llvm.mlir
@@ -1,5 +1,5 @@
-// RUN: mlir-opt %s -convert-vector-to-llvm -split-input-file | FileCheck '-D$IDX_TYPE=i32' %s
-// RUN: mlir-opt %s --convert-vector-to-llvm='force-32bit-vector-indices=0' | FileCheck '-D$IDX_TYPE=i64' %s
+// RUN: mlir-opt %...
[truncated]

``````````

</details>


https://github.com/llvm/llvm-project/pull/160055

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