[Mlir-commits] [clang] [llvm] [mlir] [AMDGPU] Add the support for 45-bit buffer resource (PR #159702)

[Krzysztof Drewniak]

================
@@ -11602,29 +11602,48 @@ SDValue SITargetLowering::lowerPointerAsRsrcIntrin(SDNode *Op,
   SDValue NumRecords = Op->getOperand(3);
   SDValue Flags = Op->getOperand(4);
 
-  auto [LowHalf, HighHalf] = DAG.SplitScalar(Pointer, Loc, MVT::i32, MVT::i32);
-  SDValue Mask = DAG.getConstant(0x0000ffff, Loc, MVT::i32);
-  SDValue Masked = DAG.getNode(ISD::AND, Loc, MVT::i32, HighHalf, Mask);
-  std::optional<uint32_t> ConstStride = std::nullopt;
-  if (auto *ConstNode = dyn_cast<ConstantSDNode>(Stride))
-    ConstStride = ConstNode->getZExtValue();
-
-  SDValue NewHighHalf = Masked;
-  if (!ConstStride || *ConstStride != 0) {
-    SDValue ShiftedStride;
-    if (ConstStride) {
-      ShiftedStride = DAG.getConstant(*ConstStride << 16, Loc, MVT::i32);
-    } else {
-      SDValue ExtStride = DAG.getAnyExtOrTrunc(Stride, Loc, MVT::i32);
-      ShiftedStride =
-          DAG.getNode(ISD::SHL, Loc, MVT::i32, ExtStride,
-                      DAG.getShiftAmountConstant(16, MVT::i32, Loc));
-    }
-    NewHighHalf = DAG.getNode(ISD::OR, Loc, MVT::i32, Masked, ShiftedStride);
+  SDValue Rsrc;
+
+  if (Subtarget->has45BitNumRecordsBufferResource()) {
+    // Build the lower 64-bit value, which has a 57-bit base and the lower 7-bit
+    // num_records.
+    SDValue ExtPointer = DAG.getAnyExtOrTrunc(Pointer, Loc, MVT::i64);
+    SDValue NumRecordsLHS =
+        DAG.getNode(ISD::SHL, Loc, MVT::i64, NumRecords,
+                    DAG.getShiftAmountConstant(57, MVT::i32, Loc));
+    SDValue LowHalf =
+        DAG.getNode(ISD::OR, Loc, MVT::i64, ExtPointer, NumRecordsLHS);
+
+    // Build the higher 64-bit value, which has the higher 38-bit num_records,
+    // 6-bit zero (omit), 14-bit stride and 6-bit zero (omit).
+    SDValue NumRecordsRHS =
+        DAG.getNode(ISD::SRL, Loc, MVT::i64, NumRecords,
+                    DAG.getShiftAmountConstant(7, MVT::i32, Loc));
+    SDValue ExtStride = DAG.getAnyExtOrTrunc(Stride, Loc, MVT::i64);
+    SDValue ShiftedStride =
+        DAG.getNode(ISD::SHL, Loc, MVT::i64, ExtStride,
+                    DAG.getShiftAmountConstant(44, MVT::i32, Loc));
+    SDValue HighHalf =
+        DAG.getNode(ISD::OR, Loc, MVT::i64, NumRecordsRHS, ShiftedStride);
----------------
krzysz00 wrote:

(and no, that doesn't go in `num_records`, since reasonable people will want to use a not-yet-existent `iN llvm.amdgcn.buffer.ptr.get.num.records.p{7,8,9}.iN(ptr addrspace(*) nocapture readnone)` to get that field so you can, for example, go out of bounds

... the fact that that getter could exist is part of why I was thinking variadic num_records so you don't have to instantly truncate that value to i32 and hope said truncation gets folded away pre-gfx12 

... then again, said getter will instcombine with a `make.buffer.rsrc` way earlier 99.9% of the time so it doesn't matetter)

https://github.com/llvm/llvm-project/pull/159702