[Mlir-commits] [mlir] 95388b2 - [OpenACC] verify acc:DataOp operand not BlockArgument (#159148)
llvmlistbot at llvm.org
llvmlistbot at llvm.org
Tue Sep 16 11:51:53 PDT 2025
Author: Scott Manley
Date: 2025-09-16T14:51:49-04:00
New Revision: 95388b2f2370d02fbe0b3c191470714edc179e44
URL: https://github.com/llvm/llvm-project/commit/95388b2f2370d02fbe0b3c191470714edc179e44
DIFF: https://github.com/llvm/llvm-project/commit/95388b2f2370d02fbe0b3c191470714edc179e44.diff
LOG: [OpenACC] verify acc:DataOp operand not BlockArgument (#159148)
Similar to #158095, check that the operand of acc::DataOp is not a
BlockArgument before trying to get its defining operation so it will not
segfault and instead produce a clean error.
Added:
Modified:
mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
mlir/test/Dialect/OpenACC/invalid.mlir
Removed:
################################################################################
diff --git a/mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp b/mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
index b82ad20d8e194..70cbde7071551 100644
--- a/mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
+++ b/mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
@@ -3144,7 +3144,8 @@ LogicalResult acc::DataOp::verify() {
"must appear on the data operation");
for (mlir::Value operand : getDataClauseOperands())
- if (!mlir::isa<acc::AttachOp, acc::CopyinOp, acc::CopyoutOp, acc::CreateOp,
+ if (isa<BlockArgument>(operand) ||
+ !mlir::isa<acc::AttachOp, acc::CopyinOp, acc::CopyoutOp, acc::CreateOp,
acc::DeleteOp, acc::DetachOp, acc::DevicePtrOp,
acc::GetDevicePtrOp, acc::NoCreateOp, acc::PresentOp>(
operand.getDefiningOp()))
diff --git a/mlir/test/Dialect/OpenACC/invalid.mlir b/mlir/test/Dialect/OpenACC/invalid.mlir
index 24ce9784393b0..26b63fbe182ea 100644
--- a/mlir/test/Dialect/OpenACC/invalid.mlir
+++ b/mlir/test/Dialect/OpenACC/invalid.mlir
@@ -840,3 +840,11 @@ func.func @verify_declare_enter(%arg0 : memref<i32>) {
acc.declare_exit token(%0) dataOperands(%arg0 : memref<i32>)
return
}
+
+func.func @verify_data(%arg0 : memref<i32>) {
+// expected-error @below {{expect data entry/exit operation or acc.getdeviceptr as defining op}}
+ acc.data dataOperands(%arg0 : memref<i32>) {
+ acc.terminator
+ }
+ return
+}
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