[Mlir-commits] [mlir] [MLIR][NVVM] Update TMA Load Op (PR #156347)

[Durgadoss R]

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@@ -157,6 +150,17 @@ LogicalResult CpAsyncBulkTensorPrefetchOp::verify() {
                              getMode(), getLoc());
 }
 
+LogicalResult CpAsyncBulkTensorGlobalToSharedClusterOp::verify() {
+  TMALoadMode mode = getMode();
+  if (getPredicate()) {
+    if (mode != TMALoadMode::TILE && mode != TMALoadMode::IM2COL)
+      return emitError(
+          "Inline-ptx lowering supported only for Tile/Im2col mode.");
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durga4github wrote:

Updated in the latest revision.
Resolving this

https://github.com/llvm/llvm-project/pull/156347