[Mlir-commits] [clang] [llvm] [mlir] [AArch64][SME] Improve codegen for aarch64.sme.cnts* when not in streaming mode (PR #154761)

[Kerry McLaughlin]

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@@ -937,6 +940,21 @@ bool AArch64DAGToDAGISel::SelectRDVLImm(SDValue N, SDValue &Imm) {
   return false;
 }
 
+// Returns a suitable RDSVL multiplier from a left shift.
+template <signed Low, signed High>
+bool AArch64DAGToDAGISel::SelectRDSVLShiftImm(SDValue N, SDValue &Imm) {
+  if (!isa<ConstantSDNode>(N))
+    return false;
+
+  int64_t MulImm = 1 << cast<ConstantSDNode>(N)->getSExtValue();
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kmclaughlin-arm wrote:

Thank you @RKSimon, I have committed this change in https://github.com/llvm/llvm-project/commit/271740c8baa08ad2451111f9d49d7cc3db92d199

https://github.com/llvm/llvm-project/pull/154761