[Mlir-commits] [mlir] [MLIR] Make 1-D memref flattening a prerequisite for vector narrow type emulation (PR #157771)

[Andrzej Warzyński]

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@@ -817,7 +818,13 @@ struct ConvertVectorStore final : OpConversionPattern<vector::StoreOp> {
 // ConvertVectorMaskedStore
 //===----------------------------------------------------------------------===//
 
-// TODO: Document-me
+/// Converts `vector.maskedstore` operations on narrow element types to work
+/// with wider, byte-aligned container types by adjusting the mask and using
+/// bitcasting.
+///
+/// Example: Storing `vector<6xi4>` is emulated by bitcasting to `vector<3xi8>`
+/// and storing with an adjusted mask, since each `i8` container element holds
+/// two `i4` values.
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banach-space wrote:

IMHO, this will flow a bit better.
```suggestion
/// Example: Storing `vector<6xi4>` is emulated by bitcasting to `vector<3xi8>` (each `i8` container element holds
/// two `i4` values) and storing with an adjusted mask .
```

https://github.com/llvm/llvm-project/pull/157771