[Mlir-commits] [clang] [llvm] [mlir] [AMDGPU] [ROCDL] Added Intrinsics for smed, umed, to support ISA instructions from ROCDL (PR #157748)

Krzysztof Drewniak llvmlistbot at llvm.org
Thu Sep 11 14:42:10 PDT 2025


krzysz00 wrote:

(and if the compiler can't reliably produce these, we may want to investigate if the backend can be made to do so)

https://github.com/llvm/llvm-project/pull/157748


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