[Mlir-commits] [mlir] [MLIR][XeVM] Add lowering for llvm load store ops with XeVM cache control (PR #156768)

[Sang Ik Lee]

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@@ -568,6 +616,22 @@ class LoadStorePrefetchToOCLPattern : public OpConversionPattern<OpType> {
     return success();
   }
 };
+template <typename OpType>
+class LLVMLoadStoreToOCLPattern : public OpConversionPattern<OpType> {
+  using OpConversionPattern<OpType>::OpConversionPattern;
+  LogicalResult
+  matchAndRewrite(OpType op, typename OpType::Adaptor adaptor,
+                  ConversionPatternRewriter &rewriter) const override {
+    if (!op->hasAttr("cache_control"))
+      return failure();
+    constexpr bool isLoad = std::is_same_v<OpType, LLVM::LoadOp>;
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silee2 wrote:

Done.

https://github.com/llvm/llvm-project/pull/156768