[Mlir-commits] [mlir] [MLIR][XeGPU] Matrix load/store subgroup distribution (PR #165008)

[Jianhui Li]

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@@ -562,6 +562,8 @@ class LoadStoreMatrixToXeVMPattern : public OpConversionPattern<OpType> {
     VectorType valOrResVecTy = dyn_cast<VectorType>(data.getType());
     if (!valOrResVecTy)
       valOrResVecTy = VectorType::get(1, data.getType());
+    if (valOrResVecTy.getShape().size() != 1)
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Jianhui-Li wrote:

if user use lane_layout = [1, 16], it should not use strided memory layout, the example above should just use block layout.  The maxtrix op with subgroup_block_io is a subgroup operation, and all lanes collectively access a contiguous memory buffer. 

https://github.com/llvm/llvm-project/pull/165008