[Mlir-commits] [mlir] [mlir][ROCDL] Add tensor load and store instructions to ROCDL (PR #165016)
Jakub Kuderski
llvmlistbot at llvm.org
Tue Oct 28 09:29:56 PDT 2025
================
@@ -663,6 +692,68 @@ def ROCDL_GlobalLoadLDSOp :
}];
}
+//===---------------------------------------------------------------------===//
+// Tensor load/store intrinsics (available in GFX1250)
+//===---------------------------------------------------------------------===//
+
+// Base class for tensor load/store operations with 4 descriptor groups.
+class ROCDL_TensorLDSIntrOp<string mnemonic> :
+ ROCDL_IntrOp<mnemonic, [], [], [], 0, 0, 1, 0, [4], ["cachePolicy"]> {
+ dag args = (ins ROCDL_V4I32Type:$dgroup0, ROCDL_V8I32Type:$dgroup1,
+ ROCDL_V4I32Type:$dgroup2, ROCDL_V4I32Type:$dgroup3,
+ I32Attr:$cachePolicy);
+ let arguments = !con(args, baseArgs);
+ let summary = "Base class for ROCDL tensor load/store to/from LDS.";
+ let description = [{
+ Moves tiles of tensor data between global memory and LDS. The tile is
+ described by the $dgroup descriptors. 4 $dgroup descriptors allows for
+ movement of up to 5D tensors. $cachePolicy describes the memory scope and an
+ indicator of expected data re-use.
+
+ This op is for gfx1250+ architectures.
+ }];
+ let assemblyFormat = [{
+ attr-dict operands `cachepolicy` $cachePolicy
----------------
kuhar wrote:
Can you also add `: type($dgroup0), type($dgroup1)`? IMO hiding types in low-level dialects is an anti-pattern. No having repeated types seem like a middle ground to me.
https://github.com/llvm/llvm-project/pull/165016
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