[Mlir-commits] [mlir] [MLIR][XeGPU] Introduce `xegpu::uArch` usage in target-sensitive passes (PR #163801)

[Charitha Saumya]

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@@ -565,10 +567,10 @@ TensorDescType::verify(llvm::function_ref<InFlightDiagnostic()> emitError,
 
   // for gather and scatter ops, Low-precision types are packed in 32-bit units.
   unsigned bitWidth = elementType.getIntOrFloatBitWidth();
-  int chunkAlignmentFactor =
-      bitWidth < targetinfo::packedSizeInBitsForGatherScatter
-          ? targetinfo::packedSizeInBitsForGatherScatter / bitWidth
-          : 1;
+  constexpr int packingBitSizeGatherScatter{32};
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charithaintc wrote:

still having hard coded numbers defeats the purpose of uArch iface. I think we have 2 alternatives here.

1) Relax the IR and check these things during lowering when uArch is available.
2) Define a base class implementation for certain things. I believe packing size for gather/scatter is common for all archs. 

https://github.com/llvm/llvm-project/pull/163801