[Mlir-commits] [mlir] [mlir][amdgpu] Add scaled_ext_packed{8, 16} operations (PR #159830)
Erick Ochoa Lopez
llvmlistbot at llvm.org
Fri Oct 17 08:57:06 PDT 2025
================
@@ -345,8 +345,12 @@ LogicalResult ScaledExtPacked816Op::verify() {
int blockSize = getBlockSize();
assert((blockSize == 16 || blockSize == 32) && "invalid block size");
int firstScaleByte = getFirstScaleByte();
- if (blockSize == 16 && firstScaleByte == 2) {
- return emitOpError("blockSize of 16 cannot have firstScaleByte be 2.");
+ if (blockSize == 16 && !::llvm::is_contained({0, 1}, firstScaleByte)) {
+ return emitOpError(
+ "blockSize of 16 can only have firstScaleByte be 0 or 1.");
+ } else if (blockSize == 32 && !::llvm::is_contained({0, 2}, firstScaleByte)) {
----------------
amd-eochoalo wrote:
Thanks https://github.com/llvm/llvm-project/pull/159830/commits/7aa6169697b3d5dd2668245b32d347c76699c6d0
https://github.com/llvm/llvm-project/pull/159830
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