[Mlir-commits] [mlir] [mlir][amdgpu] Add scaled_ext_packed{8, 16} operations (PR #159830)

Erick Ochoa Lopez llvmlistbot at llvm.org
Fri Oct 17 07:12:24 PDT 2025


================
@@ -112,6 +112,73 @@ def AMDGPU_ExtPackedFp8Op :
   }];
 }
 
+def IsValidBlockSize: AttrConstraint<
+    CPred<"::llvm::cast<::mlir::IntegerAttr>($_self).getInt() == 16 || ::llvm::cast<::mlir::IntegerAttr>($_self).getInt() == 32">,
+    "whose value is 16 or 32">;
+
+
+def Vector4Scales :
+  AllOfType<[FixedVectorOfLengthAndType<[4], [F8E8M0FNU]>],
+    "vector of 4 F8E8M0FNU scales",
+    "::mlir::VectorType">,
+  BuildableType<"::mlir::VectorType::get({4}, $_builder.getType<::mlir::Float8E8M0FNUType>());">;
----------------
amd-eochoalo wrote:

For example: https://github.com/llvm/llvm-project/pull/159830/commits/3cdb174797f65fcf67c34b244a12ffe70805f0ee

https://github.com/llvm/llvm-project/pull/159830


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