[Mlir-commits] [mlir] [MLIR][XeGPU] XeVM lowering support for load_matrix/store_matrix (PR #162780)

[Sang Ik Lee]

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@@ -503,6 +506,187 @@ class LoadStoreToXeVMPattern : public OpConversionPattern<OpType> {
   }
 };
 
+// Lower xegpu::CreateMemDescOp to memref::ViewOp. Since SLM access instructions
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silee2 wrote:

memory descriptors can have blocked layout like this example in XeGPU op doc

// A multi-dimensional array stored in a blocked layout. Elements within the same block
// are stored contiguously in memory. Blocks are stored in row-major order.
!xegpu.mem_desc<128x128xf16, #xegpu.mem_layout<block = [8, 8]>>

Seems like this lowering is only handling the case of simple row major layout.

https://github.com/llvm/llvm-project/pull/162780