[Mlir-commits] [mlir] [MLIR][Transform] FuseOp: accept transform params, add use_forall argument (PR #161883)
Tuomas Kärnä
llvmlistbot at llvm.org
Mon Oct 6 06:52:56 PDT 2025
================
@@ -665,24 +759,69 @@ transform::FuseOp::apply(transform::TransformRewriter &rewriter,
}
LogicalResult transform::FuseOp::verify() {
- SmallVector<int64_t> permutation =
- extractFromIntegerArrayAttr<int64_t>(getTileInterchange());
- auto sequence = llvm::to_vector(llvm::seq<int64_t>(0, permutation.size()));
- if (!std::is_permutation(sequence.begin(), sequence.end(),
- permutation.begin(), permutation.end())) {
- return emitOpError() << "expects interchange to be a permutation, found "
- << getTileInterchange();
+ ArrayRef<int64_t> permutation = getStaticTileInterchange();
+ if (!llvm::any_of(permutation,
+ [](int64_t v) { return ShapedType::isDynamic(v); })) {
----------------
tkarna wrote:
> what does interchange do when loop type is forall?
As one would expect, it changes the order of the iteration variables:
```cpp
%0 = scf.forall (%arg3, %arg4) = (0, 0) to (2048, 1024) step (32, 64) shared_outs(%arg5 = %arg2) -> (tensor<1024x2048xf32>) {
%slice_0 = tensor.extract_slice %arg0[%arg4, 0] [64, 512] [1, 1] : tensor<1024x512xf16> to tensor<64x512xf16>
%slice_1 = tensor.extract_slice %arg1[0, %arg3] [512, 32] [1, 1] : tensor<512x2048xf16> to tensor<512x32xf16>
...
```
with `interchange = [1, 0]` turns into
```cpp
%0 = scf.forall (%arg3, %arg4) = (0, 0) to (1024, 2048) step (64, 32) shared_outs(%arg5 = %arg2) -> (tensor<1024x2048xf32>) {
%slice_0 = tensor.extract_slice %arg0[%arg3, 0] [64, 512] [1, 1] : tensor<1024x512xf16> to tensor<64x512xf16>
%slice_1 = tensor.extract_slice %arg1[0, %arg4] [512, 32] [1, 1] : tensor<512x2048xf16> to tensor<512x32xf16>
...
```
https://github.com/llvm/llvm-project/pull/161883
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