[Mlir-commits] [mlir] Lower affine modulo by powers of two using bitwise AND (PR #146311)
Uday Bondhugula
llvmlistbot at llvm.org
Mon Oct 6 04:34:43 PDT 2025
bondhugula wrote:
> @Groverkss you mean add a canonicalizer to arith.remsi / arith.remui? In that case do we also need to handle cmp + select?
>
> The case I have in mind is incrementing `x` starting from 0 with a step of 1, and `x mod 2` is used to index one of the ping/pong buffer. Current canonicalization doesn't seem to optimize for LHS being non-negative, or RHS being power of 2.
If you had `x mod 2`, with x being a non-negative IV, the range analysis that exists should conclude that the result of `remsi` is always positive, optimizing away the cmp + select. But that doesn't accomplish the better lowering you are enabling here -- because if the LHS is negative, we can still generate a single `andi` for a mod expression in affine maps. So, if it's a canonicalization, it will have to look at `remsi + cmp + add + select`.
I'm actually surprised we missed this optimization for 6 years! :-) I'm in favor of adding this - perhaps under a flag if needed.
CC: @ftynse for review as well.
https://github.com/llvm/llvm-project/pull/146311
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