[Mlir-commits] [mlir] [mlir] Use MLIR op names when generating FileCheck variables in generate-test-checks.py (PR #160820)

Andrzej WarzyƄski llvmlistbot at llvm.org
Sun Oct 5 09:31:16 PDT 2025


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@@ -45,6 +46,14 @@
 SSA_RE_STR = "[0-9]+|[a-zA-Z$._-][a-zA-Z0-9$._-]*"
 SSA_RE = re.compile(SSA_RE_STR)
 
+# Regex matching `dialect.op_name`, where `dialect` is an upstream MLIR
+# dialect (e.g. `vector.transfer_read`).
+DIALECTS = "acc|affine|amdgpu|amx|arith|arm_neon|arm_sve|arm_sme|async|bufferization|cf|complex|dlti|emitc|\
+    func|gpu|index|irdl|linalg|llvm|math|memref|ml_program|mpi|nvgpu|nvvm|omp|pdl_interp|pdl|ptr|quant|\
+    rocdl|scf|shape|shard|smt|sparse_tensor|tensor|ub|vcix|vector|wasmssa|x86vector|xegpu|xevm|spirv|tosa|\
+    transform"
+SSA_OP_NAME_RE = re.compile(rf"\b(?:{DIALECTS})[.]([a-z_]+)\b")
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banach-space wrote:

> What happens in the case where the dialect is elided?

In the input IR? Is it ever?

> +1 to removing list of dialects.

Done

https://github.com/llvm/llvm-project/pull/160820


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