[Mlir-commits] [mlir] [ROCDL] added math instructions to the ROCDL dialect (PR #169672)

[Ravil Dorozhinskii]

================
@@ -1885,6 +1885,27 @@ def ROCDL_FMed3Op : ROCDL_IntrOp<"fmed3", [0], [], [Pure, AllTypesMatch<["res",
   }];
 }
 
+//===----------------------------------------------------------------------===//
+// Math operations
+//===----------------------------------------------------------------------===//
+
+class ROCDL_Math_IntrOp<string mnemonic, list<Trait> traits = []> :
+  ROCDL_IntrOp<mnemonic, [0], [], traits, 1>,
+  Arguments<(ins LLVM_AnyFloat:$arg)> {
+  let results = (outs LLVM_AnyFloat:$res);
----------------
ravil-mobile wrote:

Did some a comparison this morning:

```bash
declare float @llvm.amdgcn.cos.f32(float) #0

define amdgpu_kernel void @v_cos_f32(ptr addrspace(1) %out, float %src) #1 {
  %cos = call float @llvm.amdgcn.cos.f32(float %src) #0
  store float %cos, ptr addrspace(1) %out
  ret void
}

attributes #0 = { nounwind readnone }
attributes #1 = { nounwind }


; %bb.0:
    s_load_dword s2, s[4:5], 0x8
    s_load_dwordx2 s[0:1], s[4:5], 0x0
    v_mov_b32_e32 v1, 0
    s_waitcnt lgkmcnt(0)
    v_cos_f32_e32 v0, s2
    global_store_dword v1, v0, s[0:1]
    s_endpgm


; --------------------------------------------------------------


declare float @llvm.cos.f32(float) #0

define amdgpu_kernel void @v_cos_f32(ptr addrspace(1) %out, float %src) #1 {
  %cos = call float @llvm.cos.f32(float %src) #0
  store float %cos, ptr addrspace(1) %out
  ret void
}

attributes #0 = { nounwind readnone }
attributes #1 = { nounwind }


; %bb.0:
    s_load_dword s2, s[4:5], 0x8
    s_load_dwordx2 s[0:1], s[4:5], 0x0
    v_mov_b32_e32 v1, 0
    s_waitcnt lgkmcnt(0)
    v_mul_f32_e64 v0, s2, 0.15915494
    v_cos_f32_e32 v0, v0
    global_store_dword v1, v0, s[0:1]
    s_endpgm
```

https://github.com/llvm/llvm-project/pull/169672