[Mlir-commits] [mlir] [mlir][amdgpu] lowerings for ScaledExtPacked816 (PR #168123)
Erick Ochoa Lopez
llvmlistbot at llvm.org
Mon Nov 17 07:05:12 PST 2025
================
@@ -1600,6 +1613,182 @@ LogicalResult ExtPackedFp8OpLowering::matchAndRewrite(
return success();
}
+int getScaleSel(int blockSize, int bitWidth, int firstScaleLane,
+ int firstScaleByte) {
+ // When lowering amdgpu.scaled_ext_packed816 to
+ // rocdl.cvt.scale.pk*.f*.f* operations, the
+ // attributes blockSize, sourceType, firstScaleLane and firstScaleByte
+ // are merged into a single attribute scaleSel.
+ //
+ // This is how those values are merged together.
+ assert(llvm::is_contained({16, 32}, blockSize));
+ assert(llvm::is_contained({4, 6, 8}, bitWidth));
+
+ const bool is_fp8 = bitWidth == 8;
+ const bool is_block_16 = blockSize == 16;
+
+ if (!is_fp8 && firstScaleLane == 0 && firstScaleByte == 0 && !is_block_16) {
+ return 0b000;
+ }
+ if (!is_fp8 && firstScaleLane == 0 && firstScaleByte == 0 && is_block_16) {
+ return 0b001;
+ }
+ if (!is_fp8 && firstScaleLane == 0 && firstScaleByte == 2 && !is_block_16) {
+ return 0b010;
+ }
+ if (!is_fp8 && firstScaleLane == 0 && firstScaleByte == 2 && is_block_16) {
+ return 0b011;
+ }
+ if (!is_fp8 && firstScaleLane == 1 && firstScaleByte == 0 && !is_block_16) {
+ return 0b100;
+ }
+ if (!is_fp8 && firstScaleLane == 1 && firstScaleByte == 0 && is_block_16) {
+ return 0b101;
+ }
+ if (!is_fp8 && firstScaleLane == 1 && firstScaleByte == 2 && !is_block_16) {
+ return 0b110;
+ }
+ if (!is_fp8 && firstScaleLane == 1 && firstScaleByte == 2 && is_block_16) {
+ return 0b111;
+ }
+
+ if (is_fp8 && firstScaleLane == 0 && firstScaleByte == 0 && !is_block_16) {
+ return 0b0000;
+ }
+ if (is_fp8 && firstScaleLane == 0 && firstScaleByte == 0 && is_block_16) {
+ return 0b0001;
+ }
+ if (is_fp8 && firstScaleLane == 0 && firstScaleByte == 1 && !is_block_16) {
+ return 0b0010;
+ }
+ if (is_fp8 && firstScaleLane == 0 && firstScaleByte == 2 && !is_block_16) {
+ return 0b0100;
+ }
+ if (is_fp8 && firstScaleLane == 0 && firstScaleByte == 3 && !is_block_16) {
+ return 0b0110;
+ }
+ if (is_fp8 && firstScaleLane == 1 && firstScaleByte == 1 && !is_block_16) {
+ return 0b1010;
+ }
+ if (is_fp8 && firstScaleLane == 1 && firstScaleByte == 2 && !is_block_16) {
+ return 0b1100;
+ }
+ if (is_fp8 && firstScaleLane == 1 && firstScaleByte == 2 && is_block_16) {
+ return 0b1101;
+ }
+ if (is_fp8 && firstScaleLane == 1 && firstScaleByte == 3 && !is_block_16) {
----------------
amd-eochoalo wrote:
https://github.com/llvm/llvm-project/pull/168123/commits/2b010cd04d4644b06a864777de0c63edae4be0c6
https://github.com/llvm/llvm-project/pull/168123
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