[Mlir-commits] [mlir] [mlir][amdgpu] Sink op creation in scaled conversion intrinsics (NFC) (PR #168542)
Jakub Kuderski
llvmlistbot at llvm.org
Tue Nov 18 07:02:21 PST 2025
================
@@ -1767,15 +1763,21 @@ LogicalResult ScaledExtPacked816OpLowering::matchAndRewrite(
return rewriter.notifyMatchFailure(op, "type conversion failed");
}
- Value castedSource =
- LLVM::BitcastOp::create(rewriter, loc, packedType, source);
-
std::optional<StringRef> maybeIntrinsic =
scaledExtPacked816ToIntrinsic(srcElemType, destElemType);
if (!maybeIntrinsic.has_value())
return op.emitOpError(
"no intrinsic matching packed scaled conversion on the given chipset");
+ int32_t scaleSel =
+ getScaleSel(blockSize, bitWidth, firstScaleLane, firstScaleByte);
+
+ Value castedScale =
+ LLVM::BitcastOp::create(rewriter, loc, i32, adaptor.getScale());
+
+ Value castedSource =
+ LLVM::BitcastOp::create(rewriter, loc, packedType, source);
----------------
kuhar wrote:
```suggestion
int32_t scaleSel =
getScaleSel(blockSize, bitWidth, firstScaleLane, firstScaleByte);
Value castedScale =
LLVM::BitcastOp::create(rewriter, loc, i32, adaptor.getScale());
Value castedSource =
LLVM::BitcastOp::create(rewriter, loc, packedType, source);
```
https://github.com/llvm/llvm-project/pull/168542
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