[Mlir-commits] [mlir] [mlir][tosa] Allow int64 tensors in `tosa.intdiv` (PR #167367)
Luke Hutton
llvmlistbot at llvm.org
Mon Nov 10 10:41:43 PST 2025
https://github.com/lhutton1 created https://github.com/llvm/llvm-project/pull/167367
This commit extends the tosa.intdiv operand/result types to allow int64 tensors.
>From b63d30c578c6054e5ee4507c919ae963195dc395 Mon Sep 17 00:00:00 2001
From: Luke Hutton <luke.hutton at arm.com>
Date: Mon, 10 Nov 2025 18:35:35 +0000
Subject: [PATCH] [mlir][tosa] Allow int64 tensors in `tosa.intdiv`
This commit extends the tosa.intdiv operand/result types
to allow int64 tensors.
Change-Id: Idd32df6f493864610c9af6499625591a3977a9f6
---
mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td | 6 +++---
mlir/test/Dialect/Tosa/ops.mlir | 7 +++++++
2 files changed, 10 insertions(+), 3 deletions(-)
diff --git a/mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td b/mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
index 467dba3232f2b..635e77fc51983 100644
--- a/mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
+++ b/mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
@@ -826,12 +826,12 @@ def Tosa_IntDivOp : Tosa_ElementwiseOp<"intdiv", [SameOperandsAndResultElementTy
}];
let arguments = (ins
- Tosa_Int32Tensor:$input1,
- Tosa_Int32Tensor:$input2
+ Tosa_Int32Or64Tensor:$input1,
+ Tosa_Int32Or64Tensor:$input2
);
let results = (outs
- Tosa_Int32Tensor:$output
+ Tosa_Int32Or64Tensor:$output
);
list<Availability> availability = [
diff --git a/mlir/test/Dialect/Tosa/ops.mlir b/mlir/test/Dialect/Tosa/ops.mlir
index 22fde3b7d28a5..7743eaa6beb5b 100644
--- a/mlir/test/Dialect/Tosa/ops.mlir
+++ b/mlir/test/Dialect/Tosa/ops.mlir
@@ -342,6 +342,13 @@ func.func @test_intdiv(%arg0: tensor<13x21x1xi32>, %arg1: tensor<13x21x3xi32>) -
return %0 : tensor<13x21x3xi32>
}
+// -----
+// CHECK-LABEL: intdiv_i64
+func.func @test_intdiv_i64(%arg0: tensor<13x21x1xi64>, %arg1: tensor<13x21x3xi64>) -> tensor<13x21x3xi64> {
+ %0 = tosa.intdiv %arg0, %arg1 : (tensor<13x21x1xi64>, tensor<13x21x3xi64>) -> tensor<13x21x3xi64>
+ return %0 : tensor<13x21x3xi64>
+}
+
// -----
// CHECK-LABEL: logical_and
func.func @test_logical_and(%arg0: tensor<13x21x3xi1>, %arg1: tensor<13x21x1xi1>) -> tensor<13x21x3xi1> {
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