[Mlir-commits] [mlir] [mlir][NVVM] Add support for barrier0-reduction operation (PR #167036)

[Valentin Clement バレンタイン クレメン]

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@@ -1007,31 +1025,36 @@ def NVVM_BarrierOp : NVVM_Op<"barrier", [AttrSizedOperandSegments]> {
     [For more information, see PTX ISA](https://docs.nvidia.com/cuda/parallel-thread-execution/index.html#parallel-synchronization-and-communication-instructions-bar)
   }];
 
-  let arguments = (ins     
-    Optional<I32>:$barrierId,
-    Optional<I32>:$numberOfThreads);
+  let arguments = (ins Optional<I32>:$barrierId, Optional<I32>:$numberOfThreads,
+      OptionalAttr<BarrierReductionAttr>:$reductionOp,
+      Optional<I32>:$reductionPredicate);
   string llvmBuilder = [{
     llvm::Value *id = $barrierId ? $barrierId : builder.getInt32(0);
     if ($numberOfThreads)
       createIntrinsicCall(
           builder, llvm::Intrinsic::nvvm_barrier_cta_sync_aligned_count,
           {id, $numberOfThreads});
+    else if ($reductionOp)
+      createIntrinsicCall(
+          builder, getBarrierIntrinsicID($reductionOp), {$reductionPredicate});
     else
       createIntrinsicCall(
           builder, llvm::Intrinsic::nvvm_barrier_cta_sync_aligned_all, {id});
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clementval wrote:

I have added a getIntrinsicIDAndArgs for BarrierOp. 

https://github.com/llvm/llvm-project/pull/167036