[Mlir-commits] [mlir] [mlir][spirv] Disable failing Intel SubgroupBlock* op tests (PR #166185)

[Igor Wodiany]

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@@ -0,0 +1,30 @@
+// RUN: mlir-translate --no-implicit-module --test-spirv-roundtrip --split-input-file %s | FileCheck %s
+
+// TODO(#166184): Add spirv-val test once the serialization is fixed.
+
+spirv.module Logical GLSL450 requires #spirv.vce<v1.3, [Shader, Linkage, SubgroupBufferBlockIOINTEL], [SPV_KHR_storage_buffer_storage_class, SPV_INTEL_subgroups]> {
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IgWod-IMG wrote:

Actually, would changing `Logical` to `Physical32/64` fix the issue or is it some deeper serialization issue?

https://github.com/llvm/llvm-project/pull/166185