[Mlir-commits] [mlir] [MLIR][NVVM] Add prefetch Ops (PR #141737)
Srinivasa Ravi
llvmlistbot at llvm.org
Fri May 30 01:15:39 PDT 2025
================
@@ -2333,6 +2334,90 @@ def NVVM_CpAsyncBulkTensorSharedCTAToGlobalOp :
let hasVerifier = 1;
}
+//===----------------------------------------------------------------------===//
+// NVVM Prefetch Ops
+//===----------------------------------------------------------------------===//
+
+def NVVM_PrefetchL1Op : NVVM_Op<"prefetch.L1"> {
+ let description = [{
+ Brings the cache line containing the specified address into L1 cache.
+
+ Operand `ptr` can be a global, local or generic address pointer.
+ No operation is performed if `ptr` maps to a `shared` memory location.
+
+ [For more information, see PTX ISA](https://docs.nvidia.com/cuda/parallel-thread-execution/#data-movement-and-conversion-instructions-prefetch-prefetchu)
+ }];
+ let arguments = (ins AnyTypeOf<[LLVM_PointerGlobal,
+ LLVM_PointerLocal,
+ LLVM_PointerGeneric]>:$ptr);
+ let assemblyFormat = "$ptr attr-dict `:` type($ptr)";
+
+ let extraClassDeclaration = [{
+ static llvm::Intrinsic::ID getIntrinsicID(llvm::Type *ptrType);
+ }];
+ let llvmBuilder = [{
+ auto intId = NVVM::PrefetchL1Op::getIntrinsicID($ptr->getType());
+ createIntrinsicCall(builder, intId, $ptr);
+ }];
+}
+
+def EvictLast : I32EnumAttrCase<"EvictLast", 0, "evict_last">;
+def EvictNormal : I32EnumAttrCase<"EvictNormal", 1, "evict_normal">;
----------------
Wolfram70 wrote:
Oh yep, that makes sense. Added an attribute with all the eviction-priority hints in the latest revision. Thanks!
https://github.com/llvm/llvm-project/pull/141737
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