[Mlir-commits] [mlir] Atomic Options Support (PR #140932)
Anchu Rajendran S
llvmlistbot at llvm.org
Wed May 21 10:16:15 PDT 2025
https://github.com/anchuraj created https://github.com/llvm/llvm-project/pull/140932
Adding support for atomic control options for amd gpus. These are to support options `-f[no-]atomic-remote-memory, -f[no-]atomic-fine-grained-memory,
-f[no-]atomic-ignore-denormal-mode`
>From 28b688e72b6cb91777cdfc56413ff66fc02ceb18 Mon Sep 17 00:00:00 2001
From: Anchu Rajendran <asudhaku at amd.com>
Date: Tue, 20 May 2025 16:27:15 -0500
Subject: [PATCH] Atomic Options Support
---
mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td | 32 +++++++++++++++++----
mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp | 7 ++++-
mlir/test/Target/LLVMIR/llvmir.mlir | 9 ++++++
3 files changed, 42 insertions(+), 6 deletions(-)
diff --git a/mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td b/mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
index f19f9d5a3083c..7da8368c98b7c 100644
--- a/mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
+++ b/mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
@@ -2164,12 +2164,18 @@ def LLVM_AtomicRMWOp : LLVM_MemAccessOpBase<"atomicrmw", [
LLVM_AtomicRMWType:$val, AtomicOrdering:$ordering,
OptionalAttr<StrAttr>:$syncscope,
OptionalAttr<I64Attr>:$alignment,
- UnitAttr:$volatile_);
+ UnitAttr:$volatile_,
+ UnitAttr:$amdgpu_no_fine_grained_memory,
+ UnitAttr:$amdgpu_ignore_denormal_mode,
+ UnitAttr:$amdgpu_no_remote_memory);
// Append the aliasing related attributes defined in LLVM_MemAccessOpBase.
let arguments = !con(args, aliasAttrs);
let results = (outs LLVM_AtomicRMWType:$res);
let assemblyFormat = [{
- (`volatile` $volatile_^)? $bin_op $ptr `,` $val
+ (`volatile` $volatile_^)?
+ (`amdgpu_no_fine_grained_memory` $amdgpu_no_fine_grained_memory^)?
+ (`amdgpu_ignore_denormal_mode` $amdgpu_ignore_denormal_mode^)?
+ (`amdgpu_no_remote_memory` $amdgpu_no_remote_memory^)? $bin_op $ptr `,` $val
(`syncscope` `(` $syncscope^ `)`)? $ordering attr-dict `:`
qualified(type($ptr)) `,` type($val)
}];
@@ -2179,6 +2185,18 @@ def LLVM_AtomicRMWOp : LLVM_MemAccessOpBase<"atomicrmw", [
convertAtomicBinOpToLLVM($bin_op), $ptr, $val, llvm::MaybeAlign(),
convertAtomicOrderingToLLVM($ordering));
$res = inst;
+ if($amdgpu_no_fine_grained_memory) {
+ llvm::MDNode *metadata = llvm::MDNode::get(inst->getContext(), std::nullopt);
+ inst->setMetadata((inst->getContext()).getMDKindID("amdgpu.no.fine.grained.memory"), metadata);
+ }
+ if($amdgpu_ignore_denormal_mode) {
+ llvm::MDNode *metadata = llvm::MDNode::get(inst->getContext(), std::nullopt);
+ inst->setMetadata((inst->getContext()).getMDKindID("amdgpu.ignore.denormal.mode"), metadata);
+ }
+ if($amdgpu_no_remote_memory) {
+ llvm::MDNode *metadata = llvm::MDNode::get(inst->getContext(), std::nullopt);
+ inst->setMetadata((inst->getContext()).getMDKindID("amdgpu.no.remote.memory"), metadata);
+ }
}] # setVolatileCode
# setSyncScopeCode
# setAlignmentCode
@@ -2192,12 +2210,16 @@ def LLVM_AtomicRMWOp : LLVM_MemAccessOpBase<"atomicrmw", [
convertAtomicOrderingFromLLVM(atomicInst->getOrdering()),
getLLVMSyncScope(atomicInst), alignment, atomicInst->isVolatile());
}];
- list<int> llvmArgIndices = [-1, 0, 1, -1, -1, -1, -1, -1, -1, -1, -1];
+ list<int> llvmArgIndices = [-1, 0, 1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
+ -1];
let builders = [
- OpBuilder<(ins "LLVM::AtomicBinOp":$binOp, "Value":$ptr, "Value":$val,
+ OpBuilder<(ins "LLVM::AtomicBinOp":$binOp, "Value":$ptr,"Value":$val,
"LLVM::AtomicOrdering":$ordering,
CArg<"StringRef", "StringRef()">:$syncscope,
- CArg<"unsigned", "0">:$alignment, CArg<"bool", "false">:$isVolatile
+ CArg<"unsigned", "0">:$alignment, CArg<"bool", "false">:$isVolatile,
+ CArg<"bool", "false">:$isAmdgpuNoFineGrainedMemory,
+ CArg<"bool", "false">:$isAmdgpuIgnoreDenormalMode,
+ CArg<"bool", "false">:$isAmdgpuNoRemoteMemory
)>
];
let hasVerifier = 1;
diff --git a/mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp b/mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
index e17b9fd6eb8d3..4abff0320b645 100644
--- a/mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
+++ b/mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
@@ -3274,10 +3274,15 @@ OpFoldResult LLVM::ConstantOp::fold(FoldAdaptor) { return getValue(); }
void AtomicRMWOp::build(OpBuilder &builder, OperationState &state,
AtomicBinOp binOp, Value ptr, Value val,
AtomicOrdering ordering, StringRef syncscope,
- unsigned alignment, bool isVolatile) {
+ unsigned alignment, bool isVolatile,
+ bool isAmdgpuNoFineGrainedMemory,
+ bool isAmdgpuIgnoreDenormalMode,
+ bool isAmdgpuNoRemoteMemory) {
build(builder, state, val.getType(), binOp, ptr, val, ordering,
!syncscope.empty() ? builder.getStringAttr(syncscope) : nullptr,
alignment ? builder.getI64IntegerAttr(alignment) : nullptr, isVolatile,
+ isAmdgpuNoFineGrainedMemory, isAmdgpuIgnoreDenormalMode,
+ isAmdgpuNoRemoteMemory,
/*access_groups=*/nullptr,
/*alias_scopes=*/nullptr, /*noalias_scopes=*/nullptr, /*tbaa=*/nullptr);
}
diff --git a/mlir/test/Target/LLVMIR/llvmir.mlir b/mlir/test/Target/LLVMIR/llvmir.mlir
index 4ef68fa83a70d..5b5a70d8cc76c 100644
--- a/mlir/test/Target/LLVMIR/llvmir.mlir
+++ b/mlir/test/Target/LLVMIR/llvmir.mlir
@@ -1568,6 +1568,15 @@ llvm.func @atomicrmw(
// CHECK-SAME: syncscope("singlethread")
// CHECK-SAME: align 8
%27 = llvm.atomicrmw volatile udec_wrap %i32_ptr, %i32 syncscope("singlethread") monotonic {alignment = 8 : i64} : !llvm.ptr, i32
+ // CHECK: atomicrmw
+ // CHECK-SAME: !amdgpu.no.fine.grained.memory
+ %28 = llvm.atomicrmw amdgpu_no_fine_grained_memory udec_wrap %i32_ptr, %i32 monotonic {alignment = 8 : i64} : !llvm.ptr, i32
+ // CHECK: atomicrmw
+ // CHECK-SAME: !amdgpu.no.remote.memory
+ %29 = llvm.atomicrmw amdgpu_no_remote_memory udec_wrap %i32_ptr, %i32 monotonic {alignment = 8 : i64} : !llvm.ptr, i32
+ // CHECK: atomicrmw
+ // CHECK-SAME: !amdgpu.ignore.denormal.mode
+ %30 = llvm.atomicrmw amdgpu_ignore_denormal_mode udec_wrap %i32_ptr, %i32 monotonic {alignment = 8 : i64} : !llvm.ptr, i32
llvm.return
}
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