[Mlir-commits] [mlir] 63ad149 - [mlir][NFC] Fix the MLIR example format to conform to SSA form.

[llvmlistbot at llvm.org]

Author: yanming
Date: 2025-05-13T18:08:14+08:00
New Revision: 63ad1492dce7d4acff7ded2d4d657b1b0c1cacc5

URL: https://github.com/llvm/llvm-project/commit/63ad1492dce7d4acff7ded2d4d657b1b0c1cacc5
DIFF: https://github.com/llvm/llvm-project/commit/63ad1492dce7d4acff7ded2d4d657b1b0c1cacc5.diff

LOG: [mlir][NFC] Fix the MLIR example format to conform to SSA form.

Added: 
    

Modified: 
    mlir/docs/Tutorials/transform/Ch0.md

Removed: 
    


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diff  --git a/mlir/docs/Tutorials/transform/Ch0.md b/mlir/docs/Tutorials/transform/Ch0.md
index 43bcdf96d92b5..ac3989a09e543 100644
--- a/mlir/docs/Tutorials/transform/Ch0.md
+++ b/mlir/docs/Tutorials/transform/Ch0.md
@@ -35,7 +35,7 @@ Sometimes it is necessary to add elements of a vector to obtain a scalar. Some p
 The Vector dialect in MLIR defines an operation to explicitly denote a within-vector reduction:
 
 ```mlir
-%0 = vector.reduction <add>, %0 : vector<8xf32> into f32
+%1 = vector.reduction <add>, %0 : vector<8xf32> into f32
 ```
 
 When no support is available, such an operation can be transformed into a loop: