[Mlir-commits] [mlir] [MLIR][NVVM] Update support for conversions to f8x2 and f6x2 types (PR #137781)

[Durgadoss R]

================
@@ -1290,17 +1350,81 @@ llvm::Intrinsic::ID CvtFloatToTF32Op::getIntrinsicID(NVVM::FPRoundingMode rnd,
   }
 }
 
-#define CVT_TO_F6X2_ID_IMPL(type, has_relu)                                    \
+#define GET_FLOAT_TO_F6x2_ID(type, has_relu)                                   \
   has_relu ? llvm::Intrinsic::nvvm_ff_to_##type##_rn_relu_satfinite            \
            : llvm::Intrinsic::nvvm_ff_to_##type##_rn_satfinite
 
-llvm::Intrinsic::ID CvtToF6x2Op::getIntrinsicID(NVVM::CVTFP6Type type,
-                                                bool hasRelu) {
+llvm::Intrinsic::ID CvtFloatToF6x2Op::getIntrinsicID(NVVM::CVTFP6Type type,
+                                                     bool hasRelu) {
   switch (type) {
   case NVVM::CVTFP6Type::E2M3:
-    return CVT_TO_F6X2_ID_IMPL(e2m3x2, hasRelu);
+    return GET_FLOAT_TO_F6x2_ID(e2m3x2, hasRelu);
   case NVVM::CVTFP6Type::E3M2:
-    return CVT_TO_F6X2_ID_IMPL(e3m2x2, hasRelu);
+    return GET_FLOAT_TO_F6x2_ID(e3m2x2, hasRelu);
+  }
+}
+
+#define GET_FLOAT_TO_F8X2_US_ID(rnd, has_satf)                                 \
+  has_satf ? llvm::Intrinsic::nvvm_ff_to_ue8m0x2_##rnd##_satfinite             \
+           : llvm::Intrinsic::nvvm_ff_to_ue8m0x2_##rnd
+
+#define GET_FLOAT_TO_F8X2_S_ID(type, has_relu)                                 \
+  has_relu ? llvm::Intrinsic::nvvm_ff_to_##type##_rn_relu                      \
+           : llvm::Intrinsic::nvvm_ff_to_##type##_rn
+
+llvm::Intrinsic::ID CvtFloatToF8x2Op::getIntrinsicID(NVVM::CVTFP8Type type,
+                                                     NVVM::FPRoundingMode rnd,
+                                                     NVVM::SaturationMode sat,
+                                                     bool hasRelu) {
+  bool hasSatFinite = (sat == NVVM::SaturationMode::SATFINITE);
+  bool hasRoundingModeRZ = (rnd == NVVM::FPRoundingMode::RZ);
+  bool hasRoundingModeRP = (rnd == NVVM::FPRoundingMode::RP);
+
+  switch (type) {
+  case NVVM::CVTFP8Type::E4M3:
+    return GET_FLOAT_TO_F8X2_S_ID(e4m3x2, hasRelu);
+  case NVVM::CVTFP8Type::E5M2:
+    return GET_FLOAT_TO_F8X2_S_ID(e5m2x2, hasRelu);
+  case NVVM::CVTFP8Type::UE8M0:
+    if (hasRoundingModeRZ)
+      return GET_FLOAT_TO_F8X2_US_ID(rz, hasSatFinite);
+    else if (hasRoundingModeRP)
+      return GET_FLOAT_TO_F8X2_US_ID(rp, hasSatFinite);
+  }
+  llvm_unreachable("Invalid conversion in CvtFloatToF8x2Op");
+}
+
+#define GET_F16x2_TO_F8X2_ID(type, has_relu)                                   \
+  has_relu ? llvm::Intrinsic::nvvm_f16x2_to_##type##_rn_relu                   \
+           : llvm::Intrinsic::nvvm_f16x2_to_##type##_rn
+
----------------
durga4github wrote:

In general, I wonder if we can write one or two levels of macro to simplify the handling of all these intrinsic ID finding tasks.
FP_Macro(from_type, to_type, rnd, relu, satf)

Please let me know what you think



https://github.com/llvm/llvm-project/pull/137781