[Mlir-commits] [mlir] [MLIR][NVVM] Update support for conversions to f8x2 and f6x2 types (PR #137781)
Durgadoss R
llvmlistbot at llvm.org
Fri May 2 09:43:18 PDT 2025
================
@@ -133,6 +133,66 @@ LogicalResult CvtFloatToTF32Op::verify() {
return success();
}
+LogicalResult CvtFloatToF8x2Op::verify() {
+ using RndMode = NVVM::FPRoundingMode;
+ using SatMode = NVVM::SaturationMode;
+
+ bool isRoundingModeRN = getRnd() == RndMode::RN;
+ bool isRoundingModeRZ = getRnd() == RndMode::RZ;
+ bool isRoundingModeRP = getRnd() == RndMode::RP;
+ bool isSatFinite = getSat() == SatMode::SATFINITE;
+
+ bool hasRelu = getRelu();
+
+ switch (getType()) {
+ case CVTFP8Type::E4M3:
+ case CVTFP8Type::E5M2:
+ if (!(isRoundingModeRN && isSatFinite))
+ return emitOpError(
+ "Only RN rounding mode and SATFINITE saturation mode "
+ "are supported for conversions to .e4m3x2 or .e5m2x2 types from f32");
+ break;
+ case CVTFP8Type::UE8M0:
+ if (!(isRoundingModeRZ || isRoundingModeRP))
+ return emitOpError("Only RZ or RP rounding modes are supported for "
+ "conversions to .ue8m0x2 type from f32");
+ if (hasRelu)
+ return emitOpError("relu not supported for conversions to .ue8m0x2 type");
+ break;
+ }
+ return success();
+}
+
+LogicalResult CvtF16x2ToF8x2Op::verify() {
+ switch (getType()) {
+ case CVTFP8Type::E4M3:
+ case CVTFP8Type::E5M2:
+ break;
+ case CVTFP8Type::UE8M0:
+ return emitOpError("Only .e4m3 or .e5m2 types are supported for "
+ "conversions from f16x2 to f8x2.");
+ }
+ return success();
+}
+
+LogicalResult CvtBF16x2ToF8x2Op::verify() {
+ using RndMode = NVVM::FPRoundingMode;
+
+ if (getType() != CVTFP8Type::UE8M0)
+ return emitOpError(
+ "Only .ue8m0 type is supported for conversions from bf16x2 to f8x2.");
+
+ switch (getRnd()) {
+ case RndMode::RZ:
+ case RndMode::RP:
+ break;
+ default:
+ return emitOpError("Only RZ and RP rounding modes are supported for "
+ "conversions from bf16x2 to f8x2.");
----------------
durga4github wrote:
again, if-check would be cleaner
https://github.com/llvm/llvm-project/pull/137781
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